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Hi,
I'm using a AM335X ICE V2.1 and want to use UART4 which is on pins 7 & 8 of J4. I've tried to re-purpose the uartEcho demo program. I just set the uartInstance to 4 instead of three but my scope shows no serial data out of pin 8 on J4. Do I have to mux these pins out ? UART4 is in the list of applMmuEntries at the top of the program and nothing is done for UART3 so I thought 4 would work the same.
--jim schimpf
Hi Jim,
Yes, you need to set the correct pinmux for the UART4 pins. UART4 comes out on pins 7 and 8 of J3, not J4. Processor pins are UART0_CTSn and UART0_RTSn (balls E17 and E18) and they should be pinmuxed in mode 1.
I am sorry a typo on my part I did mean J3 and that's what I had hooked to but in addition to that I have to MUX the pins out right ? I did not see where that happens for UART3, the console but that must be deep in the startup code. Thank you for the help.
--jim schimpf
I am ow trying to set up the MUX for UART 4 and it doesn't seem to be working. The connection on the V2.1 ICE board is as noted above TX Line is connected to UART0_RTSn pin and the RX line is connected to the pin UART0_CSTn
I do this to set up the MUX (this is in the uartEcho example)
//uartInstance = 3;
uartInstance = 4;
/* Pin Mux for UART4_RX Pin */
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_CTSN(0)) = UART4_RX_MODE1;
/* Pin Mux for UART4 TX Pin */
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_RTSN(0)) = UART4_TX_MODE1;
}
UartOpen(uartInstance,DebugUartISR);
with these values:
// RX mode FAST RX PUllUP & Enabled Mode 1 See Ref Manual section 9.3.51
// 0 1 1 0 1
// 0x0D
#define UART4_RX_MODE1 (0x000000Du)
// TX mode FAST TX Pullup & Disabled Mode 1
// 0 0 0 1 1
// 0x3
#define UART4_TX_MODE1 (0x000003u)
And it doesn't output any serial data. What values should I use here ? Thank you for the help.
--jim schimpf
//uartInstance = 3; uartInstance = 4; /* Pin Mux for UART4_RX Pin */ HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_CTSN(0)) = UART4_RX_MODE1;
/* Pin Mux for UART4 TX Pin */ HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_RTSN(0)) = UART4_TX_MODE1;
} UartOpen(uartInstance,DebugUartISR);
I'm sorry, I cannot help on ISDK software. Also note that the UART on J3 is on logic levels (3.3V I think), not RS-232.
Thank you for your help. I have a 3.3V USB to Serial converter I'm using. Also right now I'm just watching the output with a scope.
--jim schimpf
Hi again
Found out why UART4 doesn't work the UartOpen() which is in the SDK OS drivers only supports UART0 and 5. I will try to add support for 4 and rebuild the SYSBIOS SDK.
--jim schimpf
Hi,
I've had some success with the UART4 problem. I still don't have any output or input but I do have the UART4 working inside the chip. I had to modify both the am335x_Platform files and the SYSBIOS driver files to support UART4, enclosed are the modifications:
Modified SYBIOS driver file:
/**
* \file sys_uart.c
*
* \brief SYS/BIOS UART Driver source file
*
* Copyright (c) 2012 Texas Instruments Incorporated ALL RIGHTS RESERVED
*
* Added UART4 SDS 13-Nov-2014
*/
#include "osdrv_uart.h"
#include "plat_uart.h"
Hwi_Handle uart3HwiHandle = NULL;
UART_ISR_FUNC uart3UsrISR = NULL;
char* uart3TxArray;
unsigned int uart3TxStrLength;
Hwi_Handle uart4HwiHandle = NULL; // Added in UART4
UART_ISR_FUNC uart4UsrISR = NULL;
char* uart4TxArray;
unsigned int uart4TxStrLength;
Hwi_Handle uart5HwiHandle = NULL;
UART_ISR_FUNC uart5UsrISR = NULL;
char* uart5TxArray;
unsigned int uart5TxStrLength;
/* Global variable to store the Interrupt number according to instance */
UInt intNum;
static void UARTHandleError(UInt instance)
{
UInt baseAddr = 0;
switch(instance)
{
case 3:
baseAddr = SOC_UART_3_REGS;
break;
case 4:
baseAddr = SOC_UART_4_REGS;
break;
case 5:
baseAddr = SOC_UART_5_REGS;
break;
default:
return;
}
while((UARTRxErrorGet(baseAddr)))
{
/* Read a byte from the RBR if RBR has data.*/
UARTCharGetNonBlocking(baseAddr);
}
}
Void UART5Isr(UArg arg)
{
static unsigned int uart5count = 0;
unsigned int intId = 0;
/* Checking the source of UART interrupt. */
intId = UARTIntIdentityGet(SOC_UART_5_REGS);
switch(intId)
{
case UART_INTID_TX_THRES_REACH:
if(0 != uart5TxStrLength)
{
UARTCharPut(SOC_UART_5_REGS, uart5TxArray[uart5count]);
uart5TxStrLength--;
uart5count++;
}
else
{
/* Disabling the THR interrupt. */
UARTIntDisable(SOC_UART_5_REGS, UART_INT_THR);
uart5count = 0;
}
break;
case UART_INTID_RX_THRES_REACH:
if(uart5UsrISR)
uart5UsrISR(intId);
else
UARTCharGetNonBlocking(SOC_UART_5_REGS);
break;
case UART_INTID_RX_LINE_STAT_ERROR:
case UART_INTID_CHAR_TIMEOUT:
if(uart5UsrISR)
uart5UsrISR(intId);
UARTHandleError(5);
break;
default:
break;
}
}
Void UART4Isr(UArg arg)
{
static unsigned int uart4count = 0;
unsigned int intId = 0;
/* Checking the source of UART interrupt. */
intId = UARTIntIdentityGet(SOC_UART_4_REGS);
switch(intId)
{
case UART_INTID_TX_THRES_REACH:
if(0 != uart4TxStrLength)
{
UARTCharPut(SOC_UART_4_REGS, uart4TxArray[uart4count]);
uart4TxStrLength--;
uart4count++;
}
else
{
/* Disabling the THR interrupt. */
UARTIntDisable(SOC_UART_4_REGS, UART_INT_THR);
uart4count = 0;
}
break;
case UART_INTID_RX_THRES_REACH:
if(uart4UsrISR)
uart4UsrISR(intId);
else
UARTCharGetNonBlocking(SOC_UART_4_REGS);
break;
case UART_INTID_RX_LINE_STAT_ERROR:
case UART_INTID_CHAR_TIMEOUT:
if(uart4UsrISR)
uart4UsrISR(intId);
UARTHandleError(4);
break;
default:
break;
}
}
Void UART3Isr(UArg arg)
{
static unsigned int count = 0;
unsigned int intId = 0;
/* Checking the source of UART interrupt. */
intId = UARTIntIdentityGet(SOC_UART_3_REGS);
switch(intId)
{
case UART_INTID_TX_THRES_REACH:
if(0 != uart3TxStrLength)
{
UARTCharPut(SOC_UART_3_REGS, uart3TxArray[count]);
uart3TxStrLength--;
count++;
}
else
{
/* Disabling the THR interrupt. */
UARTIntDisable(SOC_UART_3_REGS, UART_INT_THR);
count = 0;
}
break;
case UART_INTID_RX_THRES_REACH:
if(uart3UsrISR)
uart3UsrISR(intId);
else
UARTCharGetNonBlocking(SOC_UART_3_REGS);
break;
case UART_INTID_RX_LINE_STAT_ERROR:
case UART_INTID_CHAR_TIMEOUT:
if(uart3UsrISR)
uart3UsrISR(intId);
UARTHandleError(3);
break;
default:
break;
}
}
Bool UartOpen(UInt instance,UART_ISR_FUNC isrFunc)
{
Hwi_Params hwiParams;
Hwi_FuncPtr hwiFuncPointer = NULL;
Hwi_Handle tempHwiHandler;
Error_Block eb;
switch(instance)
{
case 3:
if(NULL != uart3HwiHandle )
return FALSE;
intNum = 44;
hwiFuncPointer = UART3Isr;
break;
case 4:
if(NULL != uart4HwiHandle )
return FALSE;
intNum = 45; // Guess
hwiFuncPointer = UART4Isr;
break;
case 5:
if(NULL != uart5HwiHandle )
return FALSE;
intNum = 46;
hwiFuncPointer = UART5Isr;
break;
default:
return FALSE;
}
UARTInit(instance);
Hwi_Params_init(&hwiParams);
Error_init(&eb);
// set the argument you want passed to your ISR function
hwiParams.arg = 1;
// set the event id of the peripheral assigned to this interrupt
hwiParams.priority = 0x24;
tempHwiHandler = Hwi_create(intNum ,hwiFuncPointer , &hwiParams, &eb);
if (Error_check(&eb))
{
return FALSE;
}
switch(instance)
{
case 3:
uart3HwiHandle = tempHwiHandler;
uart3UsrISR = isrFunc;
break;
case 4:
uart4HwiHandle = tempHwiHandler;
uart4UsrISR = isrFunc;
break;
case 5:
uart5HwiHandle = tempHwiHandler;
uart5UsrISR = isrFunc;
break;
default:
return FALSE;
}
Hwi_enableInterrupt(intNum);
return TRUE;
}
Bool UARTPutChar(UInt instance,Char txChar)
{
//UARTPut(instance,txChar);
unsigned int baseAddr = 0;
switch(instance)
{
case 3:
if(NULL == uart3HwiHandle )
return FALSE;
baseAddr = SOC_UART_3_REGS;
break;
case 4:
if(NULL == uart4HwiHandle )
return FALSE;
baseAddr = SOC_UART_4_REGS;
break;
case 5:
if(NULL == uart5HwiHandle )
return FALSE;
baseAddr = SOC_UART_5_REGS;
break;
default:
return FALSE;
}
UARTCharPut(baseAddr,txChar );
return TRUE;
}
Bool UARTGetChar(UInt instance,Char *rxChar)
{
//Need error check here TODO
//UARTGet(instance,&rxChar);
unsigned int baseAddr = 0;
switch(instance)
{
case 3:
if(NULL == uart3HwiHandle )
return FALSE;
baseAddr = SOC_UART_3_REGS;
break;
case 4:
if(NULL == uart4HwiHandle )
return FALSE;
baseAddr = SOC_UART_4_REGS;
break;
case 5:
if(NULL == uart5HwiHandle )
return FALSE;
baseAddr = SOC_UART_5_REGS;
break;
default:
return FALSE;
}
*rxChar = UARTCharGet(baseAddr );
return TRUE;
}
Bool UARTPutString(UInt instance,Char* buffer)
{
//UARTPuts(instance,buffer);
unsigned int baseAddr = 0;
switch(instance)
{
case 3:
if(NULL == uart3HwiHandle )
return FALSE;
baseAddr = SOC_UART_3_REGS;
uart3TxArray = buffer;
uart3TxStrLength = strlen(buffer);
break;
case 4:
if(NULL == uart4HwiHandle )
return FALSE;
baseAddr = SOC_UART_4_REGS;
uart4TxArray = buffer;
uart4TxStrLength = strlen(buffer);
break;
case 5:
if(NULL == uart5HwiHandle )
return FALSE;
baseAddr = SOC_UART_5_REGS;
uart5TxArray = buffer;
uart5TxStrLength = strlen(buffer);
break;
default:
return FALSE;
}
UARTIntEnable(baseAddr, UART_INT_THR);
return TRUE;
}
Void UartClose(UInt instance)
{
switch(instance)
{
case 3:
if(NULL != uart3HwiHandle )
Hwi_delete(&uart3HwiHandle);
uart3UsrISR = NULL;
uart3TxArray = NULL;
uart3TxStrLength = 0;
break;
case 4:
if(NULL != uart4HwiHandle )
Hwi_delete(&uart4HwiHandle);
uart4UsrISR = NULL;
uart4TxArray = NULL;
uart4TxStrLength = 0;
break;
case 5:
if(NULL != uart5HwiHandle )
Hwi_delete(&uart5HwiHandle);
uart5UsrISR = NULL;
uart5TxArray = NULL;
uart5TxStrLength = 0;
break;
default:
break;
}
}
unsigned int UartGetIntNum()
{
return intNum;
}
Modified am335x_platform
/**
* \file plat_uart.c
*
* \brief
*
*
*/
/*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*/
/* ========================================================================== */
/* Include Files */
/* ========================================================================== */
#include "plat_uart.h"
#include "hw_cm_per.h"
#include "plat_utils.h"
/* ========================================================================== */
/* Macros & Typedefs */
/* ========================================================================== */
#define BAUD_RATE_115200 (115200)
#define UART_MODULE_INPUT_CLK (48000000)
/* ========================================================================== */
/* Structures and Enums */
/* ========================================================================== */
/* ========================================================================== */
/* Internal Function Declarations */
/* ========================================================================== */
/**
* \brief A wrapper function performing Interrupt configurations.
*
* \param
*
*
* \return
*
**/
static void UARTInterruptEnable(unsigned int instanceNum);
/**
* \brief A wrapper function performing FIFO configurations.
*
* \param
*
*
* \return
*
**/
static void UARTFIFOConfigure(unsigned int instanceNum);
/**
* \brief A wrapper function performing Baud Rate settings.
*
* \param
*
*
* \return
*
**/
static void UARTBaudRateSet(unsigned int instanceNum);
/**
* \brief
*
* \param
*
*
* \return
*
**/
void UARTPinmux(unsigned int instanceNum);
/**
* \brief
*
* \param
*
*
* \return
*
**/
void UARTPowerup(unsigned int instanceNum);
/* ========================================================================== */
/* Global Variables */
/* ========================================================================== */
extern unsigned char am335x_board_type;
/* ========================================================================== */
/* Function Definitions */
/* ========================================================================== */
void UARTInit(unsigned int instanceNum)
{
unsigned int baseAddr = 0;
switch(instanceNum)
{
case 3:
baseAddr = SOC_UART_3_REGS;
break;
case 4:
baseAddr = SOC_UART_4_REGS;
break;
case 5:
baseAddr = SOC_UART_5_REGS;
break;
default:
return;
}
/* Clock enable */
UARTPowerup(instanceNum);
/* Pinumx */
UARTPinmux(instanceNum);
/* Performing a module reset. */
UARTModuleReset(baseAddr);
/* Performing FIFO configurations. */
UARTFIFOConfigure(instanceNum);
/* Switching to Configuration Mode B. */
UARTRegConfigModeEnable(baseAddr, UART_REG_CONFIG_MODE_B);
UARTSetParams(instanceNum);
/* Disabling write access to Divisor Latches. */
UARTDivisorLatchDisable(baseAddr);
/* Disabling Break Control. */
UARTBreakCtl(baseAddr, UART_BREAK_COND_DISABLE);
/* Switching to UART16x operating mode. */
UARTOperatingModeSelect(baseAddr, UART16x_OPER_MODE);
/* Performing Interrupt configurations. */
UARTInterruptEnable(instanceNum);
}
void UARTSetParams(unsigned int instanceNum)
{
unsigned int baseAddress = 0;
switch(instanceNum)
{
case 3:
baseAddress = SOC_UART_3_REGS;
break;
case 4:
baseAddress = SOC_UART_4_REGS;
break;
case 5:
baseAddress = SOC_UART_5_REGS;
break;
default:
return;
}
/* Performing Baud Rate settings. */
UARTBaudRateSet(baseAddress);
/* Programming the Line Characteristics. */
UARTLineCharacConfig(baseAddress,
(UART_FRAME_WORD_LENGTH_8 | UART_FRAME_NUM_STB_1),
UART_PARITY_NONE);
}
void UARTPowerup(unsigned int instanceNum)
{
switch(instanceNum)
{
case 3:
HWREG( SOC_PRCM_REGS + CM_PER_UART3_CLKCTRL ) |= CM_PER_UART3_CLKCTRL_MODULEMODE_ENABLE; // UART3
break;
case 4:
HWREG( SOC_PRCM_REGS + CM_PER_UART4_CLKCTRL ) |= CM_PER_UART4_CLKCTRL_MODULEMODE_ENABLE; // UART3
break;
case 5:
HWREG( SOC_PRCM_REGS + CM_PER_UART5_CLKCTRL ) |= CM_PER_UART5_CLKCTRL_MODULEMODE_ENABLE; // UART5
default:
break;
}
}
// RX mode FAST RX PUllUP & Disabled Mode 1 See Ref Manual section 9.3.51
// 0 1 1 0 1
// 0x0D
#define UART4_RX_MODE1 (0x000000Du)
// TX mode FAST TX Pullup & Disabled Mode 1
// 0 0 0 1 1
// 0x7
#define UART4_TX_MODE1 (0x000003u)
void UARTPinmux(unsigned int instanceNum)
{
switch(instanceNum)
{
case 3:
if( AM335X_BOARD_TYPE_IDK == am335x_board_type)
{
//uart3_rxd_mux1
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_CS1) = 1 | CONTROL_CONF_SPI0_CS0_CONF_SPI0_CS0_PUDEN |
CONTROL_CONF_SPI0_CS0_CONF_SPI0_CS0_RXACTIVE;
//uart3_txd_mux1
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_ECAP0_IN_PWM0_OUT) = 1;
}
else if( AM335X_BOARD_TYPE_ICE_V2 == am335x_board_type)
{
//uart3_rxd_mux
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_MII1_RXD3) =
(0x01 |
CONTROL_CONF_MII1_RXD3_CONF_MII1_RXD3_PUDEN |
CONTROL_CONF_MII1_RXD3_CONF_MII1_RXD3_RXACTIVE);
//uart3_txd_mux
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_MII1_RXD2) = 1;
}
break;
case 4:
if( AM335X_BOARD_TYPE_IDK == am335x_board_type)
{
// UART4 IDK ???
}
else if( AM335X_BOARD_TYPE_ICE_V2 == am335x_board_type)
{
/* Pin Mux for UART4_RX Pin */
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_CTSN(0)) = UART4_RX_MODE1;
/* Pin Mux for UART4 TX Pin */
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_RTSN(0)) = UART4_TX_MODE1;
}
break;
case 5:
//AM335X_BOARD_TYPE_ICE == am335x_board_type
//uart5_txd_mux
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_LCD_DATA(8)) = 4 ;
//uart5_rxd_mux
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_LCD_DATA(9)) = 4 | CONTROL_CONF_LCD_DATA9_CONF_LCD_DATA9_PUDEN |
CONTROL_CONF_LCD_DATA9_CONF_LCD_DATA9_RXACTIVE;
default:
break;
}
}
/* -------------------------------------------------------------------------- */
/* Internal Function Definitions */
/* -------------------------------------------------------------------------- */
static void UARTFIFOConfigure(unsigned int instanceNum)
{
unsigned int fifoConfig = 0;
/* Setting the TX and RX FIFO Trigger levels as 1. No DMA enabled. */
fifoConfig = UART_FIFO_CONFIG(UART_TRIG_LVL_GRANULARITY_1,
UART_TRIG_LVL_GRANULARITY_1,
1,
1,
1,
1,
UART_DMA_EN_PATH_SCR,
UART_DMA_MODE_0_ENABLE);
switch(instanceNum)
{
case 3:
/* Configuring the FIFO settings. */
UARTFIFOConfig(SOC_UART_3_REGS, fifoConfig);
break;
case 5:
/* Configuring the FIFO settings. */
UARTFIFOConfig(SOC_UART_5_REGS, fifoConfig);
break;
default:
break;
}
}
static void UARTBaudRateSet(unsigned int baseAddress)
{
unsigned int divisorValue = 0;
/* Computing the Divisor Value. */
divisorValue = UARTDivisorValCompute(UART_MODULE_INPUT_CLK,
BAUD_RATE_115200,
UART16x_OPER_MODE,
UART_MIR_OVERSAMPLING_RATE_42);
/* Programming the Divisor Latches. */
UARTDivisorLatchWrite(baseAddress, divisorValue);
}
static void UARTInterruptEnable(unsigned int instanceNum)
{
switch(instanceNum)
{
case 3:
/* Enabling the specified UART interrupts. */
UARTIntEnable(SOC_UART_3_REGS, (UART_INT_LINE_STAT | UART_INT_THR |
UART_INT_RHR_CTI));
break;
case 4:
/* Enabling the specified UART interrupts. */
UARTIntEnable(SOC_UART_4_REGS, (UART_INT_LINE_STAT | UART_INT_THR |
UART_INT_RHR_CTI));
break;
case 5:
/* Enabling the specified UART interrupts. */
UARTIntEnable(SOC_UART_5_REGS, (UART_INT_LINE_STAT | UART_INT_THR |
UART_INT_RHR_CTI));
break;
default:
break;
}
}
After building and running the modified uartEcho program setting instanceNum to 4 instead of 3 it comes up and runs. I can set a break point in osdev_uart in the new UART4Isr routine and watch it call UARTCharPut().
But alas all of this works but I still do not get any output on pin 7 of J3. I set up the pin mux in the modified code as
// RX mode FAST RX PUllUP & Disabled Mode 1 See Ref Manual section 9.3.51
// 0 1 1 0 1
// 0x0D
#define UART4_RX_MODE1 (0x000000Du)
// TX mode FAST TX Pullup & Disabled Mode 1
// 0 0 0 1 1
// 0x7
#define UART4_TX_MODE1 (0x000003u)
The pin setup is:
case 4:
if( AM335X_BOARD_TYPE_IDK == am335x_board_type)
{
// UART4 IDK ???
}
else if( AM335X_BOARD_TYPE_ICE_V2 == am335x_board_type)
{
/* Pin Mux for UART4_RX Pin */
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_CTSN(0)) = UART4_RX_MODE1;
/* Pin Mux for UART4 TX Pin */
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_RTSN(0)) = UART4_TX_MODE1;
}
break;
Any suggestions, I'm really close but not quite there yet.
Thanks for the help
--jim schimpf
And another thing no matter what I put for the Pullup value and enable pullup bit of the TX and RX line after I run the pin mux code above both lines go low.
--jim schimpf
I had the PIN mux values wrong. The values that seem to work are:
// RX mode FAST RX PUllUP & Disabled Mode 1 See Ref Manual section 9.3.51
// 0 1 1 0 01
// 0x019
#define UART4_RX_MODE1 (0x0000019u)
// TX mode FAST TX Pullup & Disabled Mode 1
// 0 0 1 0 01
// 0x9
#define UART4_TX_MODE1 (0x000009u)
And now it works.
--jim schimpf