This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

testDIO_edmaStreamLsu

Hello,

i test  the protocol SRIO in  C6474 EVM, after reading the specifications of SRIO ,I started with DIO Library  to test some example

my question espicially is how EDMA synchronised with SRIO in this example ?


because I know that the 64 EDMA channels  are not synchronized with any event of SRIO


so does anyone can give me more informations about    this example .

in  DIOLibraryAPIReferenceGuide.html   i d'ont find more informations .

thanks

  • The EDMA is used to load the LSU registers to be able to stream blocks of data > 4kB. The DIO prepares LSU-register data in RAM and the EDMA transfers it to the LSU of choice its registers. The initial transfer is kicked of by software, but after that the EDMA is triggered (synched) by the LSU Tx completion IRQ.

    Check the function DIO_rawEdmaLsuSetup() in DIO_streamingReq.c. The desctiption from the source says it all:

     *   @n@b DIO_rawEdmaLsuSetup
     *
     *   @b Description
     *   @n This function performs a "raw" EDMA streaming request. It assumes
     *      the application has pre-configured an array of DIO_LsuRegsToDma.
     *      This function gives the application a way to bypass the configuration
     *      calls from DIO_streamingReq() API, by re-using pre-set LSU commands.
     *      The user specifies an EDMA streaming channel number (only 1 on
     *      CHIP_C6455, up to 4 on CHIP_C6457/6/8)

    When the EDMA is done (at which point all SRIO transfers have been completed), the EDMA3 its Transfer complete IRQ signals the CPU that the entire chain has been completed.

    In RIO_init.c, in RIO_configIntDstAndDma(), a dummy parameter set is created which will signal the CPU that the entire Transfer is complete. See:

        CSL_edma3ParamSetup(hParamDummy[i],&edmaConfig);

    In DIO_streamingReq.c, DIO_rawEdmaLsuSetup() this paramset is linked to hParamDioStream[]:

        edmaConfig.linkBcntrld = CSL_EDMA3_LINKBCNTRLD_MAKE(hParamDummy[sNum],1);
        CSL_edma3ParamSetup(hParamDioStream[sNum] ,&edmaConfig);

    At the end of that function, the EDMA is manually kicked of with :

        CSL_edma3ChannelEventSet(hEdmaDioIccr[sNum]);

     Description:

    @n@b CSL_edma3ChannelEventSet
     *
     *   @b Description
     *   @n Manually triggers an EDMA event by setting the ER register
     * 
    
    

    Check the DIO source code for more info.

    HTH,
    -Dirk

  • thanks for your reply,

    Can you tell me the difference between DIO transactions with raw_lsu_setup=1 and those with raw_lsu_setup=0 ? it's noted that raw_lsu_setup is for max speed, why ?

    Is CIC used with EDMA in the process of sending data > 4 ko ?

    Thank you

  • This is what I make of it: when the raw_lsu_setup==1 , the program assumes you have already prepared the block with EDMA "food" (the LSU-register presets). In this case DIO_rawEdmaLsuSetup() which takes care of setting up and initiating the transfer + EDMA is called directly.

    If raw_lsu_setup==0, the  program calls DIO_streamingReq(). This function checks whather the requested Transmission is > 4kB OR whether it requires a doorbell to signal completion to the target (receiver). In this case it sets up the LSU presets and internally calls DIO_rawEdmaLsuSetup().

    So, really the 2 paths are identical, with the difference that if you repeat a transmission with the same LSU-presets over and over, you save some time by using DIO_rawEdmaLsuSetup() direcly instead of through DIO_streamingReq().

    The CIC is used in the module cslUtils.c (in your edmaLsuStream project). When you are running bare-metal, it is used to map CSL_CIC_EVENTID_RIOINT7 via CSL_CIC_ECTL_EVT2 to DIO_DST6_INT. The assigned ISR is error_cppi_isr() which is used to handle SRIO errors.

    The error scenarios which will trigger the IRQ are selected in RIO_init() :

                /* Enable all logical/transport errors */
                srioHwSetup.lgclTransErrEn = CSL_SRIO_IO_ERR_RESP_ENABLE |
                                         CSL_SRIO_ILL_TRANS_DECODE_ENABLE |
                                         CSL_SRIO_ILL_TRANS_TARGET_ERR_ENABLE |
                                         CSL_SRIO_PKT_RESP_TIMEOUT_ENABLE |
                                         CSL_SRIO_UNSOLICITED_RESP_ENABLE |
                                         CSL_SRIO_UNSUPPORTED_TRANS_ENABLE;

    Does that answer your question?

    Regards,

    -Dirk 

     

     

  • Hi ,Dirk

    Thank  you so much for your help

     

  • Hello Dirk,

    I'm using the library DioLib on the EVM board with C6474 DSPs .. I want to send data > 4ko using rapidIO so I used the example on DioLib using edma .. but it seems that there's a limit on the data size which is 64 ko .. how to do to send larger data without CPU intervention using DioLib ?

    Thank you ..

  •  

    Have you tried the"testDIO_edmaStreamLsu" example? testObjTab[1] transfers 80kB using SWRITE. DIO_rawEdmaNumLsuCmd() is used by DIO_streamingReq() to calculate the number of  LSU registers pre-program.

    The DIO lib has a nice DOxygen doc (.html) which explains how to setup the examples.

    HTH,

    -Dirk

     

     

     

     

  • Thanks for your response Dirk, but I checked what you said and it doesn't work with 80 KBytes on testObjTab[1] :

    Output :

    "DIO_dataStreamReq test 1 on stream 1 

      SWrite1 of  81920 bytes followed by doorbell notifier took  62898 cycles 

      NRead of  81920 bytes took 152862 cycles 

    Corrupted data during transaction"

    What I have changed in the initial example code :

      (Uint32)80*1024, /* NumBytes */  

    ...

    So please tell me if it's the case for you in the EVM board C6474 ..

    Thanks

     

  • Hi,

    In the EDMA Streaming DIO example I found this line that I didn't understand what does it mean :

    srioObj.intrPacing[0]    = (Uint32)0x00051615; // 1ms - doorbells' count down in DMA clock cycles (CPU/3 = 333 MHz)

    If anybody knows anything about it ?

  • All examples ran as advertised on my setup. Before you made any changes, did the original run properly on your setup? It looks like you get an error when comparing the data you sent (using SWRITE) vs the data you read back (NREAD). Is the slave example you are writing and reading from properly configured? e.g. make sure memory is mapped correctly (maybe obvious, but I thought I mention it in case).

    intrPacing relates to the maximum interrupt frequency the SRIO peripheral can "bother" the CPU with. Check the manual for more info. Basically a timer starts counting down after the peripheral generates an IRQ . Subsequent IRQs can only be generated when the timer expires.

    HTH,

    -Dirk

     

  • At last I knew why it didn't worked !

    I was using the DioLibrary 1.0.0, it was a bug on that version, so I downloaded the last version 1.1.0

    They mentioned that bug in an Excel file, in the /doc folder :

    "DIO streaming request bigger than 64 Kbytes are truncated to 64 Kbytes"

    Thank you Dirk

     

    Best Regards

    Mounir

  • Glad it works now. SRIO is pretty amazing stuff.

     

    Cheers,

    -Dirk

  • Hi again Dirk,

    Perhaps the drawback of using the DioLib 1.1.0 is that there isn't verions for other DSPs than (c6474,72,55) ;

    Now, I want to use RapidIO on the shannon c6678 .. should I create my own EDMA based transactions so as to send > 4 ko ? what do you think ?

  • Yes, that is a very good point.  Even the C6472 is not completely supported: as it is, you can only use DIO with C6472 when executing from Core 0. The modifications you'd have to make to make is work are small, but still.

    I am not familiar with the new C667x series. It uses a new SRIO peripheral (SRIO v2.1 compliant whereas the C64xx was v1.3 compliant). It also seems to have 3 EDMA3 units: 1 fast one (clock = DDR/2) and 2 "slower" ones (DDR/3). I know the EDMA3 low-level driver (LLD) has support for devices with multiple EDMA units, but since DIO uses the CSL to accomplish large transfers, you'll have to rely on what comes with your processor. Then again, both SRIO and EDMA3 peripherals will be largely backwards compatible with their predecessors.

    Most work I can see will be in the cslUtils.c file which is included in your project directly and contains the processor specifics. However, I cannot say for sure that there are other places you'll have to make modifications. Someone from the DIO team should be able to point that out (and more importantly: is a C66x supported release scheduled?). 

     

    I'm afraid I won't be of much help apart from these musings...

    -Dirk

  • The first transfer is a manual trigger kicked of when you start the transfer. You'll find more info in: DIO_streamingRec.c  DIO_rawEdmaLsuSetup().

    HTH,

    -Dirk

  • All,

    The new C66x devices have some new and really cool features for the LSUs.  There are now 8 LSUs instead of 4.  Each of the 8 LSUs has shadow registers which allow you to program multiple multi-packet transactions at a time.  In this sense, it is a replacement of the EDMA.  Each time you program the LSU, the transaction size can now be up to 1MB (instead of 4KB).  Doorbells can be generated automatically at the end of your multi-packet transaction, you don't have to program the LSU separately to send the doorbell.  Because of these features, there really are no plans to migrate the DIOLib to these devices.  We will provide a SRIO LLD however.

    For more info, check out the following:

    http://www.ti.com/litv/pdf/sprugw1

    Regards,

    Travis