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How to run the C6678 image processing Demo correctly?

Hi all,

I received the EVM6678LE board recently and I want to run the image processing demo from mcsdk.

In this process, a problem occurs. All steps are okay as the guide said, but we always cannot establish the connection between PC and EVM.

1.At first, we connect EVM and Host PC to the same router with the Gateway"192.168.1.1" and setup the static IP in mcip_master_main.c.

The situation is the same as we connect EVM and PC directly through a cable and configure them as guide.

When all cores are in running, the Console shows the followings:

[C66xx_0] EVM in StaticIP mode at 192.168.1.172
[C66xx_0] Set IP address of PC to 192.168.1.115
[C66xx_0] QMSS successfully initialized
[C66xx_0] CPPI successfully initialized
[C66xx_0] PASS successfully initialized
[C66xx_0] Ethernet subsystem successfully initialized
[C66xx_0] eventId : 48 and vectId : 7
[C66xx_0] Verify_Init: Expected 16 entry count for gTxFreeQHnd queue 736, found 30 entries
[C66xx_0] Verify_Init: Expected 0 entry count for gRxQHnd= 704, found 11 entries
[C66xx_0] Verify_Init: Expected 0 entry count for Queue number = 0, found 2 entries
[C66xx_0] Verify_Init: Expected 0 entry count for Queue number = 704, found 11 entries
[C66xx_0] Verify_Init: Expected 0 entry count for Queue number = 8192, found 2 entries
[C66xx_0] Warning:Queue handler Verification failed
[C66xx_0] Registration of the EMAC Successful, waiting for link up ..
[C66xx_0] Network Added: If-1:192.168.1.172
[C66xx_0] Service Status: HTTP     : Enabled  :          : 000

It seems the IP of EVM is set to 192.168.1.172 successfully.

2. On the other hand, we try DHCP mode, then the printf output become:

[C66xx_0] Configuring DHCP client
[C66xx_0] QMSS successfully initialized
[C66xx_0] CPPI successfully initialized
[C66xx_0] PASS successfully initialized
[C66xx_0] Ethernet subsystem successfully initialized
[C66xx_0] eventId : 48 and vectId : 7
[C66xx_0] Verify_Init: Expected 16 entry count for gTxFreeQHnd queue 736, found 62 entries
[C66xx_0] Verify_Init: Expected 0 entry count for gRxQHnd= 704, found 22 entries
[C66xx_0] Verify_Init: Expected 0 entry count for Queue number = 0, found 1 entries
[C66xx_0] Verify_Init: Expected 0 entry count for Queue number = 704, found 22 entries
[C66xx_0] Verify_Init: Expected 0 entry count for Queue number = 4095, found 1 entries
[C66xx_0] Verify_Init: Expected 0 entry count for Queue number = 8192, found 1 entries
[C66xx_0] Warning:Queue handler Verification failed
[C66xx_0] Registration of the EMAC Successful, waiting for link up ..
[C66xx_0] Service Status: DHCPC    : Enabled  :          : 000
[C66xx_0] Service Status: HTTP     : Enabled  :          : 000
[C66xx_0] Service Status: DHCPC    : Enabled  : Running  : 000

It shows EVM should got a dynamic IP(even we don't know what's the exact IP address).

But in this two modes, finally we cannot successfully find out and ping the IP of EVM in the Host PC. So of course, we cannot open the webpage at EVM's IP.

So what's the possible factors which introduce the problem?

Thanks.

Allen

  • You can try to perform a reset before you run the demo.

    Han

  • Thanks Han.

    It appears like the QMSS is not in proper state.

    [C66xx_0] Verify_Init: Expected 16 entry count for gTxFreeQHnd queue 736, found 62 entries
    [C66xx_0] Verify_Init: Expected 0 entry count for gRxQHnd= 704, found 22 entries
    [C66xx_0] Verify_Init: Expected 0 entry count for Queue number = 0, found 1 entries
    [C66xx_0] Verify_Init: Expected 0 entry count for Queue number = 704, found 22 entries
    [C66xx_0] Verify_Init: Expected 0 entry count for Queue number = 4095, found 1 entries
    [C66xx_0] Verify_Init: Expected 0 entry count for Queue number = 8192, found 1 entries
    [C66xx_0] Warning:Queue handler Verification failed

    Like Han mentioned can you try with reset (more specifically System Reset) and proceed?

    -Thanks,

    Aravind

  • I have seen the errors below myself, and have a suggestion which solved he problem for me:

    [C66xx_0] Verify_Init: Expected 16 entry count for gTxFreeQHnd queue 736, found 62 entries
    [C66xx_0] Verify_Init: Expected 0 entry count for gRxQHnd= 704, found 22 entries
    [C66xx_0] Verify_Init: Expected 0 entry count for Queue number = 0, found 1 entries
    [C66xx_0] Verify_Init: Expected 0 entry count for Queue number = 704, found 22 entries
    [C66xx_0] Verify_Init: Expected 0 entry count for Queue number = 4095, found 1 entries
    [C66xx_0] Verify_Init: Expected 0 entry count for Queue number = 8192, found 1 entries
    [C66xx_0] Warning:Queue handler Verification failed

    On the EVM board, there is a block of 4 switches called SW3 (see Page 41 of the EVM Ref Man, SPRUH58).

    The 3 switches SW3[4:2] select Boot Device, and are set at the factory to 101 binary (i.e. OFF, ON, OFF, where 1 confusingly means OFF), which selects I2C boot.

    But when loading via CCS or emulator, SW3[4:2] needs to be changed to 000 binary (ON,ON,ON), to select "EMIF16 or Emulation Boot".

    See also the EVM Quick Start Guide (Step 2) for a good photo of where SW3 is.

    If the above is not done, it seems that the I2C bootloader and default program in EEPROM may interfere with the downloaded program.

    I would be interested to hear of TI employees agree with the above.

  • Hi Jonathan,

    Your method works and it's okay now.

    Thanks.

    Allen

  • Jonathan,

    I agree to the fact that when the SW3 dip switches are set to 000 binary (ON, ON, ON) as you mentioned above, there will not be any execution of the iBL from EEPROM (and any other execution of the code from flash based on the other dip switches).

    So, for a CCS kind of development it is advisible to keep every other dip switches (SW4, SW5, SW6) along with SW3 to (ON, ON, ON, ON) and control SW3[1] for endian modes.

    In any case, it is needed to do a system reset between every load and execute of the code to make sure the QM and others are in right state.

    -Thanks,

    Aravind

  • [C66xx_0]

    [C66xx_0]

    [C66xx_0] MCSDK IMAGE PROCESSING DEMONSTRATION

    [C66xx_0]

    [C66xx_0] EVM in StaticIP mode at 192.168.2.100

    [C66xx_0] Set IP address of PC to 192.168.2.101

    [C66xx_0] QMSS successfully initialized

    [C66xx_0] CPPI successfully initialized

    [C66xx_0] PASS successfully initialized

    [C66xx_0] Ethernet subsystem successfully initialized

    [C66xx_0] eventId : 48 and vectId : 7

    [C66xx_0] Timeout waiting for reply from PA to Pa_addMac command

    [C66xx_0] Add_MACAddress failed

    [C66xx_0] Error: Unable to register the EMAC

    [C66xx_0] Service Status: HTTP : Enabled : : 000

     

     

     

    I cant get an IP address from this point. What may be wrong?

  • Hi,

    Which version of BIOS MCSDK you are using?

    Do you see this issue, if you load and run the images after doing a system reset in core 0?

    I would try NDK examples (mcsdk_#_##_##_##\examples\ndk\client\evmc6678l) to check if we are able to get an IP address and communicate to the board.

    Regards

    Sajesh

  • Hi Sajesh,


    I'm using mcsdk_2_00_00_beta2. 

    i tried NDK example as u suggested and got this while loading .out file..

    C66xx_1: File Loader: Data verification failed at address 0x80000002 Please verify target memory and memory map.

    C66xx_1: GEL: File: C:\Program Files\Texas Instruments\mcsdk_2_00_00_beta2\examples\ndk\client\evmc6678l\Debug\client_evmc6678l.out: a data verification error occurred, file load failed. 

  • i've got the IP address now...


    but I'm not able to access the webpage neither ping the IP....


    NB: Curently in static IP mode 

     

  • The would have come up with IP address 192.168.2.100, GW IP address 192.168.2.101 and subnet mask 255.255.254.0. The host PC IP address need to be set properly. Please check the link http://processors.wiki.ti.com/index.php/MCSDK_Image_Processing_Demonstration_Guide#Run_Instructions for a sample static setup information.

  •  

    Hi,

    I want to debug each of the cores of 6678L EVM.

    I am able to load the image processing binaries(master.out & slave.out) in each of master and slave cores. I am able to get a static IP for the EVM, load the BMP image and do the image processing (with all the 8 cores). I am also able to set breakpoints in the master core.

    But, how can i debug the image processing demo sequentially  - ie: can i set breakpoints at positions where it loads the image(BMP) into master core, how the image is passed on to slave cores for processing. Can we set breakpoints in master & slave core, so as to debug the cores in a sequential method.

    Kindly provide some information.

    Thanks in advance,

     

    ~Anoop.