Hi,
I am looking for documentation on the behavior of core0 when it is 'local reset' by another c6678 core, or in my case by a remote master via PCIe. I can see (via jtag experiments) that cores 1-7 jump to the boot rom, eventually landing at 0x20b002a8 where they sit in IDLE until an IPC interrupt causes them to wakeup and check the MAGIC address. Core0 does something else though. It jumps to boot rom, eventually looping around address 0x20b0c952, but not executing an IDLE instruction. Can someone tell me what it is doing here? If I send it an IPC interrupt, will it poll the MAGIC address like the other cores do?
Thanks,
Joel