CSL_intcPlugEventHandler v/s CpIntc_dispatchPlug v/s CSL_intcHookIsr

RC,

Which device are you using? Which software versions are you using?

Following the examples that are provided with the software packages will show you how to use these functions.

Regards,
RandyP

Hi Ran,

               I am using c6670.

               CCSV5 [latest 69 version], MCSDK - 02_00_09_21.

1. In Hyperlink, CSL_intcPlugEventHandler is used for hooking ISR. 

2. In SRIO, for handling ISR, CpIntc_dispatchPlug is used.

3. In AIF2, CSL_intcHookIsr is used for hooking ISR.

all above three functions based example projects are from Ti in PDK folders under c6670.

I couldn't understand the situation/context in which each of the above functions is used. Kindly answer below questions

My main question stands the same.

1. differences among them.

2. when to use which ISR HOOKING FUNCTION.

3. Any guidelines for point 2.

4. Ease of use.

5. Any major configs/settings to be taken care.

Thanks

RC Reddy 

CSL_intcHookIsr mapping ISR function to hardware interrupt vector, the function should be defined as "interrupt".

CSL system maintatins its self ISR-vector mapping table as below,

    _CSL_intcCpuIntrTable.nmiIsr  = _CSL_intcNmiDummy;     _CSL_intcCpuIntrTable.isr4  = _CSL_intcDispatcher;     _CSL_intcCpuIntrTable.isr5  = _CSL_intcDispatcher;     _CSL_intcCpuIntrTable.isr6  = _CSL_intcDispatcher;     _CSL_intcCpuIntrTable.isr7  = _CSL_intcDispatcher;     _CSL_intcCpuIntrTable.isr8  = _CSL_intcDispatcher;     _CSL_intcCpuIntrTable.isr9  = _CSL_intcDispatcher;     _CSL_intcCpuIntrTable.isr10 = _CSL_intcDispatcher;     _CSL_intcCpuIntrTable.isr11 = _CSL_intcDispatcher;     _CSL_intcCpuIntrTable.isr12 = _CSL_intcDispatcher;     _CSL_intcCpuIntrTable.isr13 = _CSL_intcDispatcher;     _CSL_intcCpuIntrTable.isr14 = _CSL_intcDispatcher;     _CSL_intcCpuIntrTable.isr15 = _CSL_intcDispatcher;

So CSL_intcPlugEventHandler just plug your own ISR in _CSL_intcDispatcher to get second jumping.

However CSL_intcHookIsr will replace the above mapping table in the corresponding place using your "interrupt" function.

CpIntc_dispatchPlug  is a BIOS function. BIOS maintains interrupt using its self APIs. In BIOS6 maybe you can mix BIOS APIs and CSL APIs in using interrupt.

Hi River Liu,

                   Many thanks for replying [with your experiences/expertise]. Let me put more discussion on this [I did some study and went through examples]. Here is my understanding/questions based on what you told. please confirm which is right and which is wrong.

This is the MAJOR diagram

System_Interrupt ==> input event on CICx ==> Host Interrupt ==> eventId[4 to 128] ==> CPUINT[4 to 15]

1. Say, if i don't use any CSL_intcHookIsr, then the default function called for any of the CPUINT4 to CPUINT15 is _CSL_intcDispatcher.

2. Say, if i use CSL_intcHookIsr for say CPUINT 9 and hook MyIsr(), then any Pulse/level sensitive signal on Interrupt PIN 9 will raise/cause the Isr function MyIsr() instead of default _CSL_intcDispatcher.

3. _CSL_intcDispatcher = Function of {CPUINT only}

System_Interrupt ==> input event on CICx ==> Host Interrupt ==> eventId ==> CPUINT

4. CSL_intcPlugEventHandler plugs Isr at event level, say i map event 

System_Interrupt ==> input event on CICx ==> Host Interrupt ==> eventId ==> CPUINT

CSL_intcPlugEventHandler  = Function of {evenId, CPUINT}

5. CpIntc_dispatchPlug plugs Isr to the system Interrupt itself.

System_Interrupt ==> input event on CICx ==> Host Interrupt ==> eventId ==> CPUINT

CpIntc_dispatchPlug  = Function of {System_Interrupt}

Hi Team Ti,

                  Please confirm if my understanding is correct.

Thanks

RC Reddy

Hi,

     Anyone member from Ti please respond to my above post

Thanks

RC Reddy

Hi Ti folks,

                Still waiting for response :-(, kindly respond

Thanks

RC Reddy

RC Reddy,

I don't know the answer to questions #1-4

As far as #5 is concerned.  CpIntc_dispatchPlug simply plugs a table with your function and argument.  This table then is used by CpIntc_dispatch when processing CpIntc interrupts.

Hwi_create() - this plugs the interrupt vector and the ISR fxn.  When using CpIntc, you must plug the Hwi fxn with CpIntc_dispatch so it knows how to process the CpIntc interrupts.

CpIntc- deals with System interrupts and Host Interrupts.

Hwi - deals with the GEM interrupt contorller.

EventCombiner - deals with the Event Combiner.

Here is a picture, hope this helps:

Judah

Hi Judah,

              Thanks for your reply, Also i need answers for questions 1 to 4. I have been re-iterating the same over and over again, please ask any Ti expert [on interrupts ] to clarify/confirm my understanding of the interrupts [questions 1 to 4]. 

Also why don't Ti publish such a simplified diagrams anywhere in the documents, This simple pic you pasted is worth more than N paragraphs reading and digesting. 

Request you to please ask an expert to answer questions on which API at which stage [where my understanding is correct] and also under what situations/contexts, which API is to be used. 

Again requesting to you pull in an expert.

Thanks

RC Reddy

Hello RC Reddy,

Please see our comments inline confirming your statements. Please let us know if you have any further questions.

Q1: Say, if i don't use any CSL_intcHookIsr, then the default function called for any of the CPUINT4 to CPUINT15 is _CSL_intcDispatcher.
A1: That is correct. Here is a snapshot of the _CSL_intcDispatcher function from CSL:
interrupt void _CSL_intcDispatcher (void)
{
    Uint32  evtId;
    Uint32  intrId = (_CSL_intcCpuIntrTable.currentVectId - \
                    (Uint32)(&_CSL_intcCpuIntrTable) - 4)/4;
        
    /* Get the Event Source of the Interrupt */
    if (intrId < 8)
        evtId = CSL_FEXTR(((CSL_IntcRegsOvly)CSL_CGEM0_5_REG_BASE_ADDRESS_REGS)->INTMUX1, \
                            (intrId-4)*8+6,(intrId-4)*8);
    else {
        if (intrId < 12)
            evtId = CSL_FEXTR(((CSL_IntcRegsOvly)CSL_CGEM0_5_REG_BASE_ADDRESS_REGS)->INTMUX2, \
                                (intrId-8)*8+6,(intrId-8)*8);
        else
            evtId = CSL_FEXTR(((CSL_IntcRegsOvly)CSL_CGEM0_5_REG_BASE_ADDRESS_REGS)->INTMUX3, \
                                (intrId-12)*8+6,(intrId-12)*8);
    }
    
    if (_CSL_intcEventOffsetMap[evtId] != CSL_INTC_MAPPED_NONE)
        _CSL_intcEventHandlerRecord[_CSL_intcEventOffsetMap[evtId]].handler (
            _CSL_intcEventHandlerRecord[_CSL_intcEventOffsetMap[evtId]].arg
            );    

Q2: Say, if i use CSL_intcHookIsr for say CPUINT 9 and hook MyIsr(), then any Pulse/level sensitive signal on Interrupt PIN 9 will raise/cause the Isr function MyIsr() instead of default _CSL_intcDispatcher.
A2: Correct

Q3: _CSL_intcDispatcher = Function of {CPUINT only}
System_Interrupt ==> input event on CICx ==> Host Interrupt ==> eventId ==> CPUINT
A3: Correct

Q4: CSL_intcPlugEventHandler plugs Isr at event level, say i map event
System_Interrupt ==> input event on CICx ==> Host Interrupt ==> eventId ==> CPUINT
CSL_intcPlugEventHandler  = Function of {eventId, CPUINT}
A4: Correct

Q5. CpIntc_dispatchPlug plugs Isr to the system Interrupt itself.
System_Interrupt ==> input event on CICx ==> Host Interrupt ==> eventId ==> CPUINT
CpIntc_dispatchPlug  = Function of {System_Interrupt}
A5: Has been explained by Judah

Hi Uday,

Can you give the code examples for cases 3 to 5?  How would you set this up?  I am still confused because when I look at some of the code examples, they also mix in BIOS interrupt calls.  Is there some advice as to how to seperate the two?  Here is an example of two sections of code that I have been trying to compare and understand.  They are both in the SRIO example code.  It seems like the first interrupt is just set up using BIOS calls and then the other one is linked a few times and then set up in BIOS?    Which example above would match each case or are they different from the descriptions above?

Thanks, Brandy

                EventCombiner_dispatchPlug (49, (EventCombiner_FuncPtr)Srio_rxCompletionIsr, (UArg)drvHandle, TRUE);

                EventCombiner_enableEvent(49);

                hSrioCSL = CSL_SRIO_Open (0);

                CSL_SRIO_DisableInterruptPacing (hSrioCSL, 0);

                CSL_SRIO_RouteLSUInterrupts (hSrioCSL, 0, 0);

                CSL_SRIO_RouteLSUInterrupts (hSrioCSL, 1, 0);

                CSL_SRIO_RouteLSUInterrupts (hSrioCSL, 2, 0);

                CpIntc_dispatchPlug(CSL_INTC0_INTDST0, (CpIntc_FuncPtr)myDioTxCompletionIsr, (UArg)drvHandle, TRUE);

                CpIntc_mapSysIntToHostInt(0, CSL_INTC0_INTDST0, 8);

                CpIntc_enableHostInt(0, 8);

                CpIntc_enableSysInt(0, CSL_INTC0_INTDST0);

                eventId = CpIntc_getEventId(8);

                EventCombiner_dispatchPlug (eventId, (EventCombiner_FuncPtr)CpIntc_dispatch, 8, TRUE);

Hi Brandy,

                good questions you put. even I was preparing the same questions.

Hi Judah and Uday,

                              Please explain the following in terms of hooking ISR's [again i repeat please tell/explain in context of ISR hooking only]

                        1. primary v/s secondary interrupts ISR handling?

                        2. BIOS v/s CSL based ISR handling?

                        3. when to use CSL functions and when to use BIOS functions?

                        4. BIOS functions before or after BIOS_start()? [if before or after, what are the consequences]

Thanks

RC Reddy

Hi Bhavin/Friedland/Judah,

                                          Interrupts being a major part, it comes as a surprise that no keystone training is available, whatever points discussed above can be put in a presentation. I request you to make it simple for the people to understand and also add a keystone training to the same. The bits and pieces information which came out of above discussion can be arranged and put in a document. 

Thanks

RC Reddy

RC Reddy,

We are in process of putting together a Wiki for the interrupts handling. We can certainly put down all above information in that.

Regards,

Bhavin

RCReddy, Brandy,

On SYS/BIOS usage for setting up interrupts, I think you will find it useful to go through the video training modules at http://processors.wiki.ti.com/index.php/EricScottVideos#TI.27s_Latest_RTOS_-_SYS.2FBIOS_Online_Video_Tutorials_With_Labs specifically the relevant sections on HWI/SWI and interrupts in the following chapters:
Chapter 2B at http://www.screencast.com/t/8mkYgMeccpz
Chapter 3 at http://www.screencast.com/t/bjdc21XZ
Chapter 4B at http://www.screencast.com/t/xKKIYuBX5w

Dear Bhavin,

Can you please share the link for the Wiki link on interrupt handling.

Also, I wish to write a MPU interrupt hook function whenever MPU interrupt occurs. Please suggest what all things I need to take care of? Is there any training available on the same (especially on interrupt hook function)?

Thanks

Regards

Anuj Agarwal