Hi all,
I have question about upp bus error.
I know the TX/RX address must be in L2SRAM.
Is it right?
I have set TX/RX address to .L2, But the situation is not gone.
The uPP Interrupt Raw Status Register (UPISR) still upp bus error.
And I can`t recevice data in loopback mode.
Can you help me?
Best Regards,
Li
