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Hi,
I am trying to get a Uart1 Receive interrupt to work. The event ID is 40 as a secondary interrupt. I configure the Uart and then set the ERBI bit. Is there anything else Im supposed to do?
Thanks,
Will
Will,
Since UART interrupt is a secondary system interrupt, you need to setup both CIC (chip level interrupt controller) and CorePac INTC for the UART interrupt.
The CIC user guide and CorePac user guide have details about the usage and example. The following wiki page also has the summary of the interrupt setup for C66x devices.
Hope it helps.
http://ap-fpdsp-swapps.dal.design.ti.com/index.php/Configuring_Interrupts_on_Keystone_Devices
Hi Steven,
How can I include the Intc library into my project. I have taken the client example for the 6657. I assumed that the CSL library in the client example already included the Intc library and all I had to do was include csl_intc.h. I am getting a linker error. Any thoughts?
Will
Hi Steven,
Found the answer. With the client example, the cfg file loads the CSL package but does not set the useCSLIntcLib to true. So what I had was:
var Csl = xdc.useModule('ti.csl.Settings');
I needed to add
Csl.useCSLIntcLib = true;
Will
Hi Steven,
Is there a good example of how to connect the secondary interrupt. I can send you my code for what I have and it doesn't seem to work. I used the ChipIntControl example 2-1 and a baseline. I just need an interrupt every time a uart char comes in over uart1.
Thanks,
Will
Will,
If you are working on BIOS project (RTSC project), it is better to use only BIOS APIs for the interrupt configuration instead of a mix of BIOS and CSL.
Please share your code and we can take a look how to do that. And actually I think the link in my previous post already has some examples for the BIOS and CSL APIs usage:
http://ap-fpdsp-swapps.dal.design.ti.com/index.php/Configuring_Interrupts_on_Keystone_Devices
Hi Steven,\
Here is what I have so far:
Void main()
{
disableHwInterrupts();
// Init Interrupt Controllers including chip-level CIC and CorePac INTC /////////////
init_interrupt_controllers();
BIOS_start();
/* enable interrupts and start SYS/BIOS */
}
void init_interrupt_controllers(void)
{
int eventId;
Hwi_Params params;
CpIntc_mapSysIntToHostInt(0, 40, 32);
CpIntc_dispatchPlug(40, &uart1ISRHandler, 40, TRUE);
CpIntc_enableHostInt(0, 32);
eventId = CpIntc_getEventId(32);
Hwi_Params_init(¶ms);
params.arg = 32;
// required to be the host interrupt #
params.eventId = eventId;
params.enableInt = TRUE;
Hwi_create(9, &CpIntc_dispatch, ¶ms, NULL);
// create ISR to handle this event in Hwi vector 4
Hwi_enableInterrupt(9);
}
Hi Steven,
My eventID is -1 and I think that is prob. the problem. I do enable the ERBI bit for the UART_B after the init interrupt controller. WHen I run, I see an interrupt pending in the UART1 register, but I don't have an interrupt flag for Interrupt 9. INterrupt 9 is enabled though.
Will
Will,
I think you plan to map the secondary system interrupt 40 (UART int) to CIC0 host output 32 and then map it to CorePac INTC input.
But the issue is the CIC0 host output 32 is NOT connected to CorePac INTC in C6657. Please take a look at the Table 7-33 in C6657 data manual.
Instead, you can map system int 40 to other CIC host output, for example, host output 42. You will see CIC0_OUTPUT42 is the input event 58 to CorePac INTC.
So your example could be updated to the following:
void init_interrupt_controllers(void)
{
int eventId;
Hwi_Params params;
CpIntc_mapSysIntToHostInt(0, 40, 42);
CpIntc_dispatchPlug(40, &uart1ISRHandler, 40, TRUE);
CpIntc_enableHostInt(0, 42);
eventId = CpIntc_getEventId(42);
Hwi_Params_init(¶ms);
params.arg = 42;
// required to be the host interrupt #
params.eventId = eventId;
params.enableInt = TRUE;
Hwi_create(9, &CpIntc_dispatch, ¶ms, NULL);
// create ISR to handle this event in Hwi vector 4
Hwi_enableInterrupt(9);
}
Then eventId should return as 58.
Hi Steven,
I tried you on other threads but did not get your reply. I hope get your reply here.
I am working on something very close to this thread. I need EDMA3 to work with UART Rx. I am using plateform_test for C6657 and UART interrupt works fine. But I just cannot get EDMA3 to move Rx data to a circular buffer.
Thanks for your support.
Regards,
Steve
Hi Steven,
I am using UART_0 RX interrupt connected to Channel 4 of EDMA, and enabled UART interrupt ERBI in IER.
I am implementing EDMA3 with UART receive. I just need EDMA3 to move UART received data to a circular buffer. Software will take data out. No interrupts.
After I setting up the EDMA3 with the UART Rx, I typed a few characters on the Hyper Terminal. The EDMA3 does not move data at all.
I used the platform_test's uart code to initialize UART peripherial with slight modification of enable ERBI interrupt and DMAMODE1 enable in FCR.
This is my EDMA PaRAM entry settings. I followed EDMA3 Controller User Guide, SPRUG55A, 3.4.1 Non-bursting Peripherals.
void EDMA3_UART_RX_Setup()
{
CSL_TPCC_ParamsetRegs *edma3_ptr = (CSL_TPCC_ParamsetRegs*)EDMA3_CH_ADDR(EDMA_PARAM_TABLE_NUM_URX0);
edma3_ptr->OPT = CSL_EDMA3_OPT_MAKE(
0, //FALSE, // itcchEn
0, //FALSE, // tcchEn
0, //INTMDT_XFR_COMPLETE_INT_DISABLE, // itcintEn
1, //XFR_COMPLETE_INT_ENABLE, // icintEn
4, //CSL_TPCC2_URXEVT, // tcc
0, //CSL_EDMA3_TCC_NORMAL, // tccMode
0, //CSL_EDMA3_FIFOWIDTH_NONE, // fwid
0, //FALSE, // stat
0, //CSL_EDMA3_SYNC_A, // syncDim
0, //CSL_EDMA3_ADDRMODE_INCR, // dam
0 //CSL_EDMA3_ADDRMODE_INCR // sam );
edma3_ptr->SRC = CSL_UART_REGS;
edma3_ptr->A_B_CNT = CSL_EDMA3_CNT_MAKE(1, RX_BUFFER_SIZE);
edma3_ptr->DST = (Uint32)global_address((Uint32)&Rx_Cir_Buf[0]);
edma3_ptr->SRC_DST_BIDX = CSL_EDMA3_BIDX_MAKE(1, 0);
edma3_ptr->LINK_BCNTRLD = CSL_EDMA3_LINKBCNTRLD_MAKE(0xFFFF, 0);
edma3_ptr->SRC_DST_CIDX = CSL_EDMA3_CIDX_MAKE(0, 0);
edma3_ptr->CCNT = 1;
}
My UART0 settings are here. It is setup by calling UartInit() in C:\ti\pdk_C6657_1_1_2_5\packages\ti\platform\evmc6657l\platform_lib\src\evmc665x_uart.c.
What might be my problems? I have a feeling that my EDMA3 does not get UART's receive event.
Thank you for your time.
Regards,
Steve
Steve,
It looks like the UART receives the data and has the "Receive data available" interrupt pending (INTID=0x2, IPEND=0 in IIR register).
On the EDMA side, could you check which EDMA TC you are using for the transfer please?
Based on Table 4-1 in C6657 data manual, only EDMA TC0 and TC2 could access UART registers.
And could you check if "edma3_ptr->SRC = CSL_UART_REGS;" equals to "edma3_ptr->SRC = (Uint32) (0x02540000);" please?
If you still see some issues, could you please share your code here and we can give a try to reproduce the issue please?
Steve,
The following CSL will map the channel to the specific queue:
// Map the channel 1 to Event Queue 3.
CSL_edma3HwChannelSetupQue(hChannel,CSL_EDMA3_QUE_3);
You can also check the EDMA registers (DMAQNUMn, section 4.2.1.5 in EDMA user guide) to see how the channels are associated to the transmit queue. By default, all channels requests are submitted to queue 0.
It will be good if you could provide the example code to reproduce the issue.
Hi Steven,
I implemented CSL_edma3HwChannelSetupQue(), and the EDMA3 is still not working. I am attaching my project McBSP_EDMA3. UART code is in uart_driver.c and the routine setup EDMA3 is EDMA3_UART_RX_Setup(). The project first setup EDMA3 with McBSP, that part works. Then it try to setup EDMA3 with UART. That I need your help.
You are the only one had given me really help. So I specifically named you to work with me. Thank you very much for the support.
Regards,
Steve
Steve,
Thanks for the source files.
I think there are two things we need to check. One is to enable "DMAMODE1" field in FCR register (the platform init seems to disable it by default). Another is the EDMA configuration.
So I added the following two lines in your "uart_driver.c" file to enable the DMA event support in UART:
CSL_FINS (hUartRegs->FCR, UART_FCR_DMAMODE1, CSL_UART_FCR_DMAMODE1_ENABLE);
CSL_FINS (hUartRegs->IER, UART_IER_ERBI, CSL_UART_IER_ERBI_ENABLE);
And there is another EDMA channel configuration example added in the same file named as "EDMA_Uart_ChannelOpen()".
With those updates, I could see the data input in the UART Terminal could be transferred to the RX buffer.
Please take a look and hope it could help.
/*******************************************************************************
* S. Qu creation. 11/14/2012 10:16AM
******************************************************************************/
#include <ti/sysbios/family/c66/tci66xx/CpIntc.h>
#include <ti/sysbios/family/c64p/Hwi.h>
#include <ex_incl.h>
#include "platform.h"
#include <cslr_uart.h>
#include <evmc665x_uart.h>
#include <val_util.h>
#include <test_init.h> /* for EDMA3 Testcase specific */
#include <uart_ref.h>
#include <csl_edma3Aux.h>
#define UART_SYSTEM_TEST
#define CIC_HOST_INTERRUPT4UART 42
#define INTC_INTERRUPT4UART 9
#define SYSTEM_INTERRUPT_UART_A 164
#define SYSTEM_INTERRUPT_UART_B 40
#define UART_FIFO_SIZE 16
#define TX_BUFFER_SIZE 0x1000
#define RX_BUFFER_SIZE 0x1000
#define TX_CIR_BUF_NEXT(x) ((x+1)&(TX_BUFFER_SIZE-1))
#define TX_CIR_BUF_INC(x) (x=(TX_CIR_BUF_NEXT(x)))
#define RX_CIR_BUF_NEXT(x) ((x+1)&(RX_BUFFER_SIZE-1))
#define RX_CIR_BUF_INC(x) (x=(RX_CIR_BUF_NEXT(x)))
#pragma DATA_ALIGN(Tx_Cir_Buf, 32)
Uint8 Tx_Cir_Buf[2][TX_BUFFER_SIZE];
Uint32 Tx_Buf_Head = 0, Tx_Buf_Tail = 0;
#pragma DATA_ALIGN(Rx_Cir_Buf, 32)
Uint8 Rx_Cir_Buf[2][RX_BUFFER_SIZE];
Uint32 Rx_Buf_Head = 0, Rx_Buf_Tail = 0;
Uint32 uart_isr_flag = 0;
Uint32 UART_Error = 0;
Int8 *Tx0_UART_Buffer[2];
Int8 *Rx0_UART_Buffer[2];
Int8 *Tx1_UART_Buffer[2];
Int8 *Rx1_UART_Buffer[2];
#ifdef UART_SYSTEM_TEST
Int8 UART_Test_Buf[100];
Int8 uart_test_msg[] = "Found a '3' in the input stream. ";
#endif
#define UART_IER (*(unsigned int *)0x02540004)
/******************************************************************************/
// write data from Tx circular buffer to UART0 port. Tail chase head,
// called from idle task.
/******************************************************************************/
void Write_UART()
{
Uint8 ch;
Uint32 i;
if (CSL_UART_LSR_THRE_FULL == (CSL_FEXT(hUartRegs->LSR, UART_LSR_THRE)))
return;
for (i = 0; i < UART_FIFO_SIZE; i++)
{
if (Tx_Buf_Tail == Tx_Buf_Head)
break; // no more to write.
ch = Tx_Cir_Buf[0][Tx_Buf_Tail];
CSL_FINS(hUartRegs->THR, UART_THR_DATA, ch);
#ifdef UART_SYSTEM_TEST
if (ch == 0x0D)
CSL_FINS(hUartRegs->THR, UART_THR_DATA, 0x0A);
#endif
TX_CIR_BUF_INC(Tx_Buf_Tail);
}
} // Write_UART
/******************************************************************************/
// application writes output data to UART tx circular buffer. Head chase tail,
// but cannot equal to tail.
// return: number of bytes wrote.
/******************************************************************************/
Uint32 UART_Output(Int8 buf[], Uint32 size)
{
Uint32 i;
for (i = 0; i < size; i++)
{
if (TX_CIR_BUF_NEXT(Tx_Buf_Head) == Tx_Buf_Tail)
{
LOGSTATUS(UART_OUTPUT_OVERRUN);
break; // buffer over flow
}
Tx_Cir_Buf[0][Tx_Buf_Head] = buf[i];
TX_CIR_BUF_INC(Tx_Buf_Head);
}
return i;
} // UART_Output
/******************************************************************************/
// Application reads input data from UART rx circular buffer. Tail chase head.
// return: number of bytes read.
/******************************************************************************/
Uint32 UART_Input(Int8 buf[], Uint32 size)
{
Uint32 i;
for (i = 0; i < size; i++)
{
if (Rx_Buf_Tail == Rx_Buf_Head)
break; // no more data
buf[i] = Rx_Cir_Buf[0][Rx_Buf_Tail];
#ifdef UART_SYSTEM_TEST
CSL_FINS(hUartRegs->THR, UART_THR_DATA, buf[i]);
if (buf[i] == 0x0D)
CSL_FINS(hUartRegs->THR, UART_THR_DATA, 0x0A);
#endif
RX_CIR_BUF_INC(Rx_Buf_Tail);
}
return i;
} // UART_Input
/******************************************************************************/
// test code to echo UART inputs.
/******************************************************************************/
void Write_Echo_UART()
{
Uint8 ch;
while(Rx_Buf_Tail != Rx_Buf_Head)
{
ch = Rx_Cir_Buf[0][Rx_Buf_Tail];
CSL_FINS(hUartRegs->THR, UART_THR_DATA, ch);
#ifdef UART_SYSTEM_TEST
if (ch == 0x0D)
CSL_FINS(hUartRegs->THR, UART_THR_DATA, 0x0A);
#endif
RX_CIR_BUF_INC(Rx_Buf_Tail);
}
} // Write_Echo_UART
/******************************************************************************/
// read data from UART0 port to rx circular buffer. Head chase tail, but
// cannot equal to tail. Called from isr.
/******************************************************************************/
void Read_UART()
{
Uint8 ch;
while (CSL_UART_LSR_DR_READY == (CSL_FEXT(hUartRegs->LSR, UART_LSR_DR)))
{
if (RX_CIR_BUF_NEXT(Rx_Buf_Head) == Rx_Buf_Tail)
{
UART_Error++;
LOGSTATUS(UART_INPUT_OVERRUN);
break;
}
ch = CSL_FEXT(hUartRegs->RBR, UART_RBR_DATA);
Rx_Cir_Buf[0][Rx_Buf_Head] = ch;
RX_CIR_BUF_INC(Rx_Buf_Head);
}
} // Read_UART
/******************************************************************************/
#define UART_BAUDRATE 115200
#if 0
void test_uart()
{
uint8_t message[] = "\r\nThis is a Platform UART API unit test ...\r\n";
int length = strlen((char *)message);
uint8_t buf;
int i;
WRITE_info setting;
// platform_uart_set_baudrate(UART_BAUDRATE);
/* Don't echo to the uart since we are testing on it */
setting = platform_write_configure (PLATFORM_WRITE_PRINTF);
platform_write("Type 10 characters in serial console\n");
for (i = 0; i < length; i++) {
platform_uart_write(message[i]);
}
for (i = 0; i < 10; i++) {
platform_errno = PLATFORM_ERRNO_RESET;
if (platform_uart_read(&buf, 30 * 10000000) == Platform_EOK) {
platform_write("Char %d = %c\n", i, buf);
} else {
platform_write("Char %d = %c (errno: 0x%x)\n", i, buf, platform_errno);
}
}
platform_write_configure (setting);
}
#endif // 0
// EDMA3 code. not working yet.
#if 1
#define EDMA_PARAM_TABLE_NUM_URX0 (14)
#define EDMA3_TX_CHANNEL 1
#define EDMA3_RX_CHANNEL 0
#define PARAM_SIZE 0x20
#define EDMA3_CH_ADDR(ch) (PARAM_BASE+(PARAM_SIZE*ch))
/*******************************************************************************
* this routine sets up UART in PaRAM.
*******************************************************************************/
extern CSL_Edma3Handle hModule;
CSL_Edma3ChannelObj chObjUART0;
CSL_Edma3ChannelHandle hUART0;
CSL_Edma3ChannelAttr chParamUART0;
CSL_Status uartStatus;
CSL_Edma3ChannelHandle hEdmaUartXevt,hEdmaUartRevt;
CSL_Edma3ChannelObj edmaUartXmtObj,edmaUartRcvObj;
CSL_Edma3ChannelAttr chParam;
CSL_Edma3HwDmaChannelSetup chSetup;
CSL_Edma3ParamHandle hParamUart;
Uint32 option;
CSL_Edma3ParamSetup myParamSetup;
void EDMA_Uart_ChannelOpen(void)
{
chParam.regionNum = CSL_EDMA3_REGION_GLOBAL;
chParam.chaNum =4;
hEdmaUartRevt = CSL_edma3ChannelOpen(&edmaUartRcvObj,\
CSL_TPCC_2,&chParam, &uartStatus);
option = CSL_EDMA3_OPT_MAKE(FALSE,FALSE,FALSE,TRUE,4,
FALSE,
FALSE,
FALSE,
FALSE,//TRUE,
FALSE,
FALSE);
myParamSetup.option = option;
myParamSetup.srcAddr = (Uint32)CSL_UART_REGS;
myParamSetup.aCntbCnt = CSL_EDMA3_CNT_MAKE(1,RX_BUFFER_SIZE);
myParamSetup.dstAddr = (Uint32)global_address((Uint32)&Rx_Cir_Buf[0]);
myParamSetup.srcDstBidx = CSL_EDMA3_BIDX_MAKE(0,1);
myParamSetup.linkBcntrld = CSL_EDMA3_LINKBCNTRLD_MAKE(0xFFFF,0x0);
myParamSetup.srcDstCidx = CSL_EDMA3_CIDX_MAKE(0, 0);
myParamSetup.cCnt = (1);
CSL_edma3HwChannelSetupQue(hEdmaUartRevt,0);
CSL_edma3HwChannelSetupParam(hEdmaUartRevt,EDMA_PARAM_TABLE_NUM_URX0);
hParamUart = CSL_edma3GetParamHandle(hEdmaUartRevt,EDMA_PARAM_TABLE_NUM_URX0,&uartStatus);
CSL_edma3ParamSetup(hParamUart, &myParamSetup);
CSL_edma3HwChannelControl(hEdmaUartRevt,CSL_EDMA3_CMD_CHANNEL_ENABLE,NULL);
}
void EDMA3_UART_RX_Setup()
{
CSL_TPCC_ParamsetRegs *edma3_ptr = (CSL_TPCC_ParamsetRegs*)EDMA3_CH_ADDR(EDMA_PARAM_TABLE_NUM_URX0);
chParamUART0.regionNum = -1; // CSL_EDMA3_REGION_GLOBAL;
chParamUART0.chaNum = 4;
//hUART0 = CSL_edma3ChannelOpen(&chObjUART0, 0, &chParamUART0, &uartStatus);
hUART0 = CSL_edma3ChannelOpen(&chObjUART0, CSL_TPCC_2, &chParamUART0, &uartStatus);
CSL_edma3HwChannelSetupQue(hUART0, CSL_EDMA3_QUE_0);
//CSL_edma3HwChannelSetupQue(hUART0, CSL_EDMA3_QUE_2);
//CSL_edma3MapEventQueueToTC(hModule, CSL_EDMA3_QUE_2, 2);
edma3_ptr->OPT = CSL_EDMA3_OPT_MAKE(
0, //FALSE, // itcchEn
0, //FALSE, // tcchEn
0, //INTMDT_XFR_COMPLETE_INT_DISABLE, // itcintEn
1, //XFR_COMPLETE_INT_ENABLE, // icintEn
4, //CSL_TPCC2_URXEVT, // tcc
0, //CSL_EDMA3_TCC_NORMAL, // tccMode
0, //CSL_EDMA3_FIFOWIDTH_NONE, // fwid
0, //FALSE, // stat
0, //CSL_EDMA3_SYNC_A, // syncDim
0, //CSL_EDMA3_ADDRMODE_INCR, // dam
0 //CSL_EDMA3_ADDRMODE_INCR // sam
);
edma3_ptr->SRC = CSL_UART_REGS;
edma3_ptr->A_B_CNT = CSL_EDMA3_CNT_MAKE(1, RX_BUFFER_SIZE);
edma3_ptr->DST = (Uint32)global_address((Uint32)&Rx_Cir_Buf[0]);
edma3_ptr->SRC_DST_BIDX = CSL_EDMA3_BIDX_MAKE(1, 0);
edma3_ptr->LINK_BCNTRLD = CSL_EDMA3_LINKBCNTRLD_MAKE(0xFFFF, 0);
edma3_ptr->SRC_DST_CIDX = CSL_EDMA3_CIDX_MAKE(0, 0);
edma3_ptr->CCNT = 1;
// memcpy((Uint8 *)&edma3_ptr[1], (Uint8 *)edma3_ptr, PARAM_SIZE);
// edma3_ptr[0].LINK_BCNTRLD = EDMA3_CH_ADDR(EDMA_PARAM_TABLE_RLD_URX0)&0x0000FFFF|0x00010000;
// edma3_ptr[1].LINK_BCNTRLD = edma3_ptr[0].LINK_BCNTRLD;
CSL_edma3HwChannelControl(hUART0,CSL_EDMA3_CMD_CHANNEL_ENABLE,NULL);
} // EDMA3_UART_RX_Setup
#endif
/******************************************************************************/
ti_sysbios_interfaces_IHwi_FuncPtr uart_isr (UArg arg)
{
Uint32 int_id;
uart_isr_flag++;
CpIntc_disableHostInt(0, CIC_HOST_INTERRUPT4UART);
CpIntc_clearSysInt(0, SYSTEM_INTERRUPT_UART_A);
int_id = CSL_FEXT(hUartRegs->IIR, UART_IIR_INTID);
switch (int_id)
{
case CSL_UART_IIR_INTID_MODSTAT:
break;
case CSL_UART_IIR_INTID_THRE:
Write_UART();
break;
case CSL_UART_IIR_INTID_RDA:
case CSL_UART_IIR_INTID_CTI:
Read_UART();
#ifdef UART_SYSTEM_TEST
UART_Input(UART_Test_Buf, sizeof(UART_Test_Buf));
#endif
break;
case CSL_UART_IIR_INTID_RLS:
break;
default: // reserved
break;
}
Hwi_clearInterrupt(INTC_INTERRUPT4UART);
CpIntc_enableHostInt(0, CIC_HOST_INTERRUPT4UART);
return NULL;
}
/******************************************************************************/
extern void dummy_isr (UArg arg);
/******************************************************************************/
void Setup_UART_Interrupt()
{
int eventId;
Hwi_Params params;
CpIntc_mapSysIntToHostInt(0, SYSTEM_INTERRUPT_UART_A, CIC_HOST_INTERRUPT4UART);
CpIntc_dispatchPlug(SYSTEM_INTERRUPT_UART_A, &dummy_isr, SYSTEM_INTERRUPT_UART_A, TRUE);
CpIntc_enableHostInt(0, CIC_HOST_INTERRUPT4UART);
eventId = CpIntc_getEventId(CIC_HOST_INTERRUPT4UART);
Hwi_Params_init(¶ms);
params.arg = CIC_HOST_INTERRUPT4UART;
params.eventId = eventId;
params.enableInt = TRUE;
Hwi_create(INTC_INTERRUPT4UART, (ti_sysbios_interfaces_IHwi_FuncPtr)uart_isr, ¶ms, NULL);
Hwi_enableInterrupt(INTC_INTERRUPT4UART);
} // Setup_UART_Interrupt
static void test_uart(void)
{
uint8_t message[] = "\r\nThis is a Platform UART API unit test ...\r\n";
int length = strlen((char *)message);
uint8_t buf;
int i;
WRITE_info setting;
//platform_uart_set_baudrate(args->init_config_uart_baudrate);
/* Don't echo to the uart since we are testing on it */
setting = platform_write_configure (PLATFORM_WRITE_PRINTF);
platform_write("Open a serial port console in a PC connected to\n");
platform_write("the board using UART and set its baudrate to %d\n", UART_BAUDRATE);
platform_write("You should see following message --- %s", message);
platform_write("Type 10 characters in serial console\n");
for (i = 0; i < length; i++) {
platform_uart_write(message[i]);
}
#if 0
for (i = 0; i < 10; i++) {
platform_errno = PLATFORM_ERRNO_RESET;
if (platform_uart_read(&Rx_Cir_Buf[0][i], 30 * 10000000) == Platform_EOK) {
platform_write("Char %d = %c\n", i, buf);
} else {
platform_write("Char %d = %c (errno: 0x%x)\n", i, buf, platform_errno);
}
}
#endif
platform_write_configure (setting);
}
/******************************************************************************/
void UARTConfig(void)
{
platform_write_configure(PLATFORM_WRITE_ALL);
UartInit();
platform_uart_set_baudrate(UART_BAUDRATE);
CSL_FINS (hUartRegs->FCR, UART_FCR_DMAMODE1, CSL_UART_FCR_DMAMODE1_ENABLE);
CSL_FINS (hUartRegs->IER, UART_IER_ERBI, CSL_UART_IER_ERBI_ENABLE);
//EDMA3_UART_RX_Setup();
EDMA_Uart_ChannelOpen();
#if 0
platform_write("UART test start\n");
test_uart();
platform_write("UART test complete\n");
#endif
// Setup_UART_Interrupt();
} // UARTConfig
Hi Steven,
Haven't contact you for a while, hope everything is well with you.
Now I encounted a problem with SPI Tx using EDMA3. My transmit routine EDMA_SPI_Tx(buf, size) only worked once. When I called it again, it did nothing. What could be the problem?
Thank you.
Regards,
Steve
Steve,
I think you already refer to the DMA event support section in SPI user guide.
And for the continuous EDMA transfer, we need to setup reload paramSet for EDMA channels for the continuous peripheral support (refer to section 3.4.3 in EDMA user guide).
And we can disable/enable the DMAREQEN bit in the SPIINT0 register to re-trigger the TX/RX DMA request.
Please take a look at the following thread which has some SPI-EDMA example code:
http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/170614.aspx?pi168778=2
Hope it could help.
Hi Steven,
Thanks for the precise answeres. After I setup reload paramSet for EDMA and use DMAREQEN to re-trigger TX DMA request. SPI TX DMA works well now.
I have been help me so much and I really appreciate your great technical support.
Best Regards,
Steve
Hi Steven,
I am trying to a memory to memory copy by EDAM3 and having problem triggering it.Table 7-32 EDMA3_CC Event for C6655/57 does not have explicit memory to memory copy trigger. I am using 43 CIC1_OUT0 and it doesn't work.
My source files are attached here.
/*******************************************************************************
* File name: spi_driver.c
* S. Qu creation. 4/12/2013 9:33AM
******************************************************************************/
//#include <ti/sysbios/family/c66/tci66xx/CpIntc.h>
#include <ti/sysbios/family/c64p/Hwi.h>
#include <ex_incl.h>
#include <csl_edma3Aux.h>
#include <platform_internal.h>
#define ACNT_SIZE 1 // 2 x 8 = 16 bits
#define DMA_TEST_BUF_SIZE 0x20
Int8 dma_dst[DMA_TEST_BUF_SIZE];
Int8 dma_src[DMA_TEST_BUF_SIZE] =
{ 0xff,0xee,0xdd,0xcc,0xbb,0xaa,0x99,0x88,0x77,0x66,0x55,0x44,0x33,0x22,0x11,0x00,
0x01,0x23,0x34,0x45,0x56,0x67,0x78,0x89,0x9a,0xab,0xbc,0xcd,0xde,0xef,0xf0,0x01};
Uint32 DMA_Channel_Full = 0;
/******************************************************************************/
// Application asynchonously copies inbuf to outbuf. If all DMA copy channels are busy,
// it busy waits for a first open channel.
// return: number of bytes setup to DMA.
/******************************************************************************/
void memcpyInitDMA()
{
Uint32 i;
CSL_TPCC_ParamsetRegs *edma3_ptr = (CSL_TPCC_ParamsetRegs*)PARAM_BASE;
CSL_TPCC_ParamsetRegs *ptr;
for (i = 0; i < EDMA_COPY_CHS; i++)
{
ptr = &edma3_ptr[EDMA_PARAM_TABLE_NUM_COPY+i];
ptr->OPT = 0;
ptr->SRC = 0;
ptr->A_B_CNT = 0;
ptr->DST = 0;
ptr->SRC_DST_BIDX = 0;
ptr->LINK_BCNTRLD = 0;
ptr->SRC_DST_CIDX = 0;
ptr->CCNT = 0;
}
} // memcpyDMA
/******************************************************************************/
// Application asynchonously copies inbuf to outbuf. If all DMA copy channels are busy,
// it busy waits for a first open channel.
// return: number of bytes setup to DMA.
/******************************************************************************/
Uint32 memcpyDMA(Int8 dst[], Int8 src[], Uint32 size)
{
Uint32 i, tcc;
CSL_TPCC_ParamsetRegs *edma3_ptr = (CSL_TPCC_ParamsetRegs*)PARAM_BASE;
CSL_TPCC_ParamsetRegs *ptr;
for (i = 0; i < EDMA_COPY_CHS; i++)
{
tcc = CSL_TPCC2_INTC1_OUT0 + i;
ptr = &edma3_ptr[EDMA_PARAM_TABLE_NUM_COPY+i];
if (ptr->CCNT)
continue;
ptr->OPT = CSL_EDMA3_OPT_MAKE(FALSE, // itcchEn
FALSE, // tcchEn
FALSE, // itcintEn
TRUE, // tcintEn
tcc, // tcc
FALSE, // tccMode
FALSE, // fwid
FALSE, // stat
FALSE, // syncDim
FALSE, // dam
FALSE); // sam
ptr->SRC = (Uint32)global_address((Uint32)src);
ptr->A_B_CNT = CSL_EDMA3_CNT_MAKE(ACNT_SIZE, size);
ptr->DST = (Uint32)global_address((Uint32)dst);
ptr->SRC_DST_BIDX = CSL_EDMA3_BIDX_MAKE(ACNT_SIZE,0);
ptr->LINK_BCNTRLD = CSL_EDMA3_LINKBCNTRLD_MAKE(0xFFFF,0x0);
ptr->SRC_DST_CIDX = CSL_EDMA3_CIDX_MAKE(0, 0);
ptr->CCNT = 1;
*(Uint32 *)(EVTSET_BASE+4) |= (1 << (tcc - 32));
break;
}
if (i >= EDMA_COPY_CHS)
{
DMA_Channel_Full++;
return 0;
}
else
return size;
} // memcpyDMA
Uint32 DMACopyTest()
{
memcpyInitDMA();
return memcpyDMA(dma_dst, dma_src, DMA_TEST_BUF_SIZE);
}
Thank you.
Regards,
Steve
Steve,
First, are you able to manually trigger the EDMA transfer with current EDMA setup please (such as by writing ESR register, section 2.4.1.2 in EDMA user guide)?
If manually-triggering is working, you could check how the EDMA is being triggered by event ( section 2.4.1.1 in EDMA user guide).
You can check ER and EER to see if EDMA could receive the event correctly.
If EDMA could not receive the event, you need to check how CIC1 has been set, which is not shown in your code attached.
You may need to map a CIC1 input (system event) to CIC1 host output (CIC1_OUT0) and trigger the system event input which could trigger the event connected to CIC1_OUT0, such as EDMA channel 43.
Hope you could narrow down the issue with several debugging steps.
Steven,
Thanks for a quick reply. In fact, I only need to do manual trigger DMA for memory to memory copy.
In line 84, I set bit E43 to 1 in ESRH register. That did not trigger the transfer. What did I do wrong?
Thanks.
Regards,
Steve
Steven,
I read your reference document and decided to use QDMA. But when I write to the trigger word (CCNT). It does not transfer data (no copy occured).
See attached source code.
Thank you.
Regards,
Steve
/*******************************************************************************
* File name: spi_driver.c
* S. Qu creation. 4/12/2013 9:33AM
******************************************************************************/
//#include <ti/sysbios/family/c66/tci66xx/CpIntc.h>
#include <ti/sysbios/family/c64p/Hwi.h>
#include <ex_incl.h>
#include <csl_edma3Aux.h>
#include <platform_internal.h>
#define ACNT_SIZE 1 // 2 x 8 = 16 bits
#define DMA_TEST_BUF_SIZE 0x20
Int8 dma_dst[DMA_TEST_BUF_SIZE];
Int8 dma_src[DMA_TEST_BUF_SIZE] =
{ 0xff,0xee,0xdd,0xcc,0xbb,0xaa,0x99,0x88,0x77,0x66,0x55,0x44,0x33,0x22,0x11,0x00,
0x01,0x23,0x34,0x45,0x56,0x67,0x78,0x89,0x9a,0xab,0xbc,0xcd,0xde,0xef,0xf0,0x01};
Uint32 DMA_Channel_Full = 0;
/******************************************************************************/
// initialize QDMA.
/******************************************************************************/
void memcpyInitDMA()
{
Uint32 i;
CSL_TPCC_ParamsetRegs *edma3_ptr = (CSL_TPCC_ParamsetRegs*)PARAM_BASE;
CSL_TPCC_ParamsetRegs *ptr;
for (i = 0; i < EDMA_COPY_CHS; i++)
{
ptr = &edma3_ptr[EDMA_PARAM_TABLE_NUM_COPY+i];
ptr->OPT = 0;
ptr->SRC = 0;
ptr->A_B_CNT = 0;
ptr->DST = 0;
ptr->SRC_DST_BIDX = 0;
ptr->LINK_BCNTRLD = 0;
ptr->SRC_DST_CIDX = 0;
ptr->CCNT = 0;
*(((Uint32 *)QCHMAP_BASE) + i) = ((EDMA_PARAM_TABLE_NUM_COPY + i) << 5) |
(CSL_EDMA3_TRIGWORD_CCNT << 2);
}
} // memcpyDMA
/******************************************************************************/
// Application asynchonously copies inbuf to outbuf. If all DMA copy channels are busy,
// it busy waits for a first open channel.
// return: number of bytes setup to DMA.
/******************************************************************************/
Uint32 memcpyDMA(Int8 dst[], Int8 src[], Uint32 size)
{
Uint32 i;
CSL_TPCC_ParamsetRegs *edma3_ptr = (CSL_TPCC_ParamsetRegs*)PARAM_BASE + EDMA_PARAM_TABLE_NUM_COPY;
CSL_TPCC_ParamsetRegs *ptr;
for (i = 0; i < EDMA_COPY_CHS; i++)
{
ptr = &edma3_ptr[i];
if (ptr->CCNT)
continue;
ptr->OPT = CSL_EDMA3_OPT_MAKE(FALSE, // itcchEn
FALSE, // tcchEn
FALSE, // itcintEn
FALSE, // tcintEn
0, // tcc
0, // tccMode
FALSE, // fwid
TRUE, // stat
FALSE, // syncDim
FALSE, // dam
FALSE); // sam
ptr->SRC = (Uint32)global_address((Uint32)src);
ptr->A_B_CNT = CSL_EDMA3_CNT_MAKE(ACNT_SIZE, size);
ptr->DST = (Uint32)global_address((Uint32)dst);
ptr->SRC_DST_BIDX = CSL_EDMA3_BIDX_MAKE(ACNT_SIZE,0);
ptr->LINK_BCNTRLD = CSL_EDMA3_LINKBCNTRLD_MAKE(0xFFFF,0x0);
ptr->SRC_DST_CIDX = CSL_EDMA3_CIDX_MAKE(0, 0);
ptr->CCNT = 1; // trigger word
break;
}
if (i >= EDMA_COPY_CHS)
{
DMA_Channel_Full++;
return 0;
}
else
return size;
} // memcpyDMA
Uint32 DMACopyTest()
{
memcpyInitDMA();
return memcpyDMA(dma_dst, dma_src, DMA_TEST_BUF_SIZE);
}
Steve,
For QDMA usage, could you check if you enabled the QDMA channel in QDMA event enable register (QEER)?
And could you try to program DSTBIDX other than 0 to see if destination data could be allocated correctly?
I do not have device at my hand to try your example until next week. But you may try the CSL EDMA example located at :
C:\ti\pdk_C6678_x_x_x\packages\ti\csl\example\edma\edma_test.c
It has examples of both EDMA and QDMA setup. You may just need to change the instance number to test on C6657 (inst_num=2). Or you can compare the setup to see if anything missing in your example. Hope it could help.
Steven,
I made the following changes: 1) set QEESR to 0x03. 2) chanded DSTBIDX to 1. QDMA still does not copy.
In my installation: C:\ti\pdk_C6657_1_1_2_5\packages\ti\csl\example, there is no edma_test.c.
I download DMA_All_in_One_Transfer(); from an E2E thread. That doesn't work either. It loops on IPR infinitely.
Thank you.
Regards,
Steve
Steve,
I attached the C6678 EDMA CSL example code below. You may need to make some modifications for C6657 CSL since there is only one EDMA instance in C6657 (which has the same base address as EDMA instance 2 in C6678). But it could give you a general idea of using CSL to trigger EDMA/QDMA transfer. Hope it could help.
Steven,
Thanks for the attached file. I changed the instance to 2 at line 902, Uint8 instNum = 2;
I ran it and there is no copy from srcBuff1 to dstBuff1. Below is the output of the code.
**************************************************
******************* EDMA Testing *****************
**************************************************
Debug: Testing EDMA(2) Ping-Pong Test (Global) Region for Channel 0...
Error: Verification (Source1/Destination1) Failed
Error: Testing EDMA(2) Ping-Pong Test (Global) Region for Channel 0 FAILED
/**
* @file edma_test.c
*
* @brief
* This is the Example test code for the EDMA CSL Functional layer.
*
* \par
* NOTE:
* (C) Copyright 2009 Texas Instruments, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include <stdio.h>
#include <ti/csl/csl_edma3.h>
#include <ti/csl/csl_edma3Aux.h>
#include <ti/csl/csl_cacheAux.h>
/**********************************************************************
************************** Global Variables **************************
**********************************************************************/
/* Global Variables which are used to dump the TPCC register overlay in the
* debugger... */
//CSL_TpccRegs* gEDMACC0Regs = (CSL_TpccRegs*)CSL_EDMA0CC_REGS;
//CSL_TpccRegs* gEDMACC1Regs = (CSL_TpccRegs*)CSL_EDMA1CC_REGS;
//CSL_TpccRegs* gEDMACC2Regs = (CSL_TpccRegs*)CSL_EDMA2CC_REGS;
/* Global Buffers (Source and Destination) for PING-PONG */
Uint8 srcBuff1[512];
Uint8 srcBuff2[512];
Uint8 dstBuff1[512];
Uint8 dstBuff2[512];
/**********************************************************************
************************ EDMA TEST FUNCTIONS *************************
**********************************************************************/
/**
* @b Description
* @n
* This is utility function used by the EDMA example to verify the
* Data transfer.
*
* @retval
* Success - TRUE
* @retval
* Error - FALSE
*/
static Bool Verify_Transfer
(
Uint16 aCnt,
Uint16 bCnt,
Uint16 cCnt,
Uint16 srcBIdx,
Uint16 dstBIdx,
Uint16 srcCIdx,
Uint16 dstCIdx,
Uint8 *srcBuff,
Uint8 *dstBuff,
Bool abSync
)
{
Uint32 loopIndex1;
Uint32 loopIndex2;
Uint32 loopIndex3;
Uint8* srcArrayPtr = (Uint8*)srcBuff;
Uint8* dstArrayPtr = (Uint8*)dstBuff;
Uint8* srcFramePtr = (Uint8*)srcBuff;
Uint8* dstFramePtr = (Uint8*)dstBuff;
Uint16 key;
/* Invalidate the cache before verification */
/* Disable Interrupts */
key = _disable_interrupts();
CACHE_invL1d ((void *)srcBuff, 512, CACHE_WAIT);
CACHE_invL2 ((void *)srcBuff, 512, CACHE_WAIT);
CACHE_invL1d ((void *)dstBuff, 512, CACHE_WAIT);
CACHE_invL2 ((void *)dstBuff, 512, CACHE_WAIT);
_mfence();
/* Re-enable Interrupts. */
_restore_interrupts(key);
for (loopIndex1 = 0; loopIndex1 < cCnt; loopIndex1++) {
for (loopIndex2 = 0; loopIndex2 < bCnt; loopIndex2++) {
for (loopIndex3 = 0; loopIndex3 < aCnt; loopIndex3++)
if (srcArrayPtr[loopIndex3] != dstArrayPtr[loopIndex3])
return FALSE;
srcArrayPtr = srcArrayPtr + srcBIdx;
dstArrayPtr = dstArrayPtr + dstBIdx;
}
if (abSync) {
srcFramePtr = srcFramePtr + srcCIdx;
srcArrayPtr = srcFramePtr;
dstFramePtr = dstFramePtr + dstCIdx;
dstArrayPtr = dstFramePtr;
}
else {
srcFramePtr = srcArrayPtr + srcCIdx - srcBIdx;
srcArrayPtr = srcFramePtr;
dstFramePtr = dstArrayPtr + dstCIdx - dstBIdx;
dstArrayPtr = dstFramePtr;
}
}
return TRUE;
}
/**
* @b Description
* @n
* This is the example routine which perform EDMA ping pong buffer transfer
* using a QDMA Channel.
* It implements following steps:-
* - Initializes and Opens the EDMA module
* - Sets up the Module and gets the module setup values
* - Enables the DMA and QDMA regions
* - Opens the specified QDMA channel 'channelNum'
* - PING uses PARAM Entry 1
* - PONG uses PARAM Entry 2
* - Configures the PARAM Blocks.
* - Enables the channel
* - Initiates the QDMA Transfer by setting the Trigger Word.
* - Poll on the IPR bit
* - Clear the pending bit
* - Compares the transfered data
* - Closes EDMA module
*
* @param[in] instNum
* EDMA Instance Number on which the test is executed.
* @param[in] channelNum
* EDMA Channel Number on which the test is executed
*
* @retval
* Success - 0
* @retval
* Failure - <0
*/
static Int32 qdma_link_xfer_region (Int32 instNum, Uint8 channelNum, Int32 regionNum)
{
CSL_Edma3Handle hModule;
CSL_Edma3Obj edmaObj;
CSL_Edma3ParamHandle hParamPong,hParamPing;
CSL_Edma3ChannelObj chObj;
CSL_Edma3CmdIntr regionIntr;
CSL_Edma3CmdDrae regionAccess;
CSL_Edma3ChannelHandle hChannel;
CSL_Edma3ParamSetup myParamSetup;
CSL_Edma3Context context;
CSL_Edma3ChannelAttr chAttr;
CSL_Edma3CmdQrae qraeSetup;
CSL_Status status;
Uint32 loopIndex;
/* Start the EDMA PING-PONG test over the SHADOW Region. */
printf ("Debug: Testing EDMA(%d) Ping-Pong Test (Shadow) Region %d for QDMA Channel %d...\n",
instNum, regionNum, channelNum);
/* Initialize data */
for (loopIndex = 0; loopIndex < 256; loopIndex++) {
srcBuff1[loopIndex] = loopIndex;
srcBuff2[loopIndex] = loopIndex;
dstBuff1[loopIndex] = 0;
dstBuff2[loopIndex] = 0;
}
/* Module initialization */
if (CSL_edma3Init(&context) != CSL_SOK)
{
printf ("Error: EDMA module initialization failed\n");
return -1;
}
/* Module level open */
hModule = CSL_edma3Open(&edmaObj,instNum,NULL,&status);
if ((hModule == NULL) || (status != CSL_SOK))
{
printf ("Error: EDMA module open failed\n");
return -1;
}
/* Is this for GLOBAL or SHADOW Region */
if (regionNum != CSL_EDMA3_REGION_GLOBAL)
{
/* Shadow Region: Enable DRAE enable(Bits 0-15) it. */
regionAccess.region = regionNum;
regionAccess.drae = 0xFFFF;
regionAccess.draeh = 0x0000;
if (CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_DMAREGION_ENABLE, ®ionAccess) != CSL_SOK)
{
printf ("Error: EDMA region enable command failed\n");
return -1;
}
/* Enable access for all QDMA channels in the SHADOW Region. */
qraeSetup.region = regionNum;
qraeSetup.qrae = 0xFF;
if (CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_QDMAREGION_ENABLE, &qraeSetup) != CSL_SOK)
{
printf ("Error: EDMA QDMA region enable command failed\n");
return -1;
}
}
/* QDMA Channel Open */
chAttr.regionNum = regionNum;
chAttr.chaNum = channelNum;
hChannel = CSL_edma3ChannelOpen(&chObj, instNum, &chAttr, &status);
if ((hChannel == NULL) || (status != CSL_SOK))
{
printf ("Error: EDMA channel open failed\n");
return -1;
}
/* Map QDMA Channel to the PING Param Block i.e. 1 */
CSL_edma3HwChannelSetupParam (hChannel, 1);
/* Setup the trigger word for the QDMA Channel. */
CSL_edma3HwChannelSetupTriggerWord(hChannel, 7);
/* PING Parameter Entry Handle */
hParamPing = CSL_edma3GetParamHandle(hChannel, 1, &status);
if (hParamPing == NULL)
{
printf ("Error: EDMA get handle for param entry 1 failed\n");
return -1;
}
/* PONG Parameter Entry Handle */
hParamPong = CSL_edma3GetParamHandle(hChannel, 2, &status);
if (hParamPong == NULL)
{
printf ("Error: EDMA get handle for param entry 2 failed\n");
return -1;
}
/* Setup param entry */
myParamSetup.option = CSL_EDMA3_OPT_MAKE(CSL_EDMA3_ITCCH_DIS, \
CSL_EDMA3_TCCH_DIS, \
CSL_EDMA3_ITCINT_DIS, \
CSL_EDMA3_TCINT_DIS,\
0,CSL_EDMA3_TCC_NORMAL,\
CSL_EDMA3_FIFOWIDTH_NONE, \
CSL_EDMA3_STATIC_DIS, \
CSL_EDMA3_SYNC_A, \
CSL_EDMA3_ADDRMODE_INCR, \
CSL_EDMA3_ADDRMODE_INCR);
myParamSetup.srcAddr = (Uint32)srcBuff1;
myParamSetup.aCntbCnt = CSL_EDMA3_CNT_MAKE(256,1);
myParamSetup.dstAddr = (Uint32)dstBuff1;
myParamSetup.srcDstBidx = CSL_EDMA3_BIDX_MAKE(1,1);
myParamSetup.linkBcntrld= CSL_EDMA3_LINKBCNTRLD_MAKE(hParamPong,0);
myParamSetup.srcDstCidx = CSL_EDMA3_CIDX_MAKE(0,1);
myParamSetup.cCnt = 1;
/* Setup PING to operate with this PARAM Entry. */
if (CSL_edma3ParamSetup(hParamPing, &myParamSetup) != CSL_SOK)
{
printf ("Error: EDMA param setup failed\n");
return -1;
}
/* Setting up the next entry */
myParamSetup.option = CSL_EDMA3_OPT_MAKE(CSL_EDMA3_ITCCH_DIS, \
CSL_EDMA3_TCCH_DIS, \
CSL_EDMA3_ITCINT_DIS, \
CSL_EDMA3_TCINT_EN,\
1,CSL_EDMA3_TCC_NORMAL,\
CSL_EDMA3_FIFOWIDTH_NONE, \
CSL_EDMA3_STATIC_EN, \
CSL_EDMA3_SYNC_A, \
CSL_EDMA3_ADDRMODE_INCR, \
CSL_EDMA3_ADDRMODE_INCR);
myParamSetup.srcAddr = (Uint32)srcBuff2;
myParamSetup.dstAddr = (Uint32)dstBuff2;
/* Setup for the Pong buffer */
if (CSL_edma3ParamSetup(hParamPong,&myParamSetup) != CSL_SOK)
{
printf ("Error: EDMA param setup failed\n");
return -1;
}
/* Enable Channel */
if (CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_ENABLE, NULL) != CSL_SOK)
{
printf ("Error: EDMA channel enable command failed\n");
return -1;
}
/* Trigger the word by writing to the trigger word... */
if (CSL_edma3ParamWriteWord(hParamPing,7,1) != CSL_SOK) {
printf ("Error: EDMA param write word failed\n");
return -1;
}
/* Poll IPR bit */
regionIntr.region = regionNum;
do {
CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INTRPEND,®ionIntr);
} while (!(regionIntr.intr & 0x2));
/* Clear pending interrupt */
if (CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTRPEND_CLEAR, ®ionIntr) != CSL_SOK)
{
printf ("Error: EDMA clear interrupt pend command failed\n");
return -1;
}
/* Check transfer by comparing the source and destination buffers */
if(Verify_Transfer( 256, 1, 1, 0, 0, 0, 0, srcBuff1, dstBuff1,TRUE) == FALSE)
{
printf ("Error: Verification (Source1/Destination1) Failed\n");
return -1;
}
if(Verify_Transfer( 256, 1, 1, 0, 0, 0, 0, srcBuff2, dstBuff2,TRUE) == FALSE)
{
printf ("Error: Verification (Source2/Destination2) Failed\n");
return -1;
}
/* Disable the channel */
CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_DISABLE, NULL);
/* Close channel */
if (CSL_edma3ChannelClose(hChannel) != CSL_SOK)
{
printf("Error: EDMA channel close failed\n");
return -1;
}
/* Close EDMA module */
if (CSL_edma3Close(hModule) != CSL_SOK)
{
printf("Error: EDMA module close failed\n");
return -1;
}
/* Test Passed. */
return 0;
}
/**
* @b Description
* @n
* This is the example routine which perform EDMA ping pong buffer transfer
* where channel is open in the global region.
* It implements following steps
* - Intializes and Opens the EDMA Module .
* - Sets up the interrupt for the EDMA global region.
* - Sets up the EDMA module using the API csl_edma3Hwsetup ()
* - Enables the EDMA global region
* - Opens the channel 'channelNum' get the param handle for PARAM 1, 2
* - PING is mapped to PARAM Entry 1
* - PONG is mapped to PARAM Entry 2
* - PING is Linked with PONG...
* - Enables the EDMA interrupt using CSL_EDMA3_CMD_INTR_ENABLE.
* - Enables Interrupt (Bit 0-2) for the global region interrupts
* - Manually triggers the DMA channel 'channelNum'(This should be PING)
* - Polls on IPR bit 0 (Since TCC for PING is 0)
* - Clear the pending bit
* - Manually triggers the channel 'channelNum' (This should be PONG)
* - Polls on IPR bit 1 (Since TCC for PONG is 1)
* - Clears the pending bit
* - Compares the data in the destination buffer is proper or not.
* - Closes the EDMA module and channel.
*
* @param[in] instNum
* EDMA Instance Number on which the test is executed.
* @param[in] channelNum
* EDMA Channel Number on which the test is executed
*
* @retval
* Success - 0
* @retval
* Failure - <0
*/
static Int32 edma_ping_pong_xfer_gbl_region (Int32 instNum, Uint8 channelNum)
{
CSL_Edma3Handle hModule;
CSL_Edma3Obj edmaObj;
CSL_Edma3ParamHandle hParamPing;
CSL_Edma3ParamHandle hParamPong;
CSL_Edma3ChannelObj chObj;
CSL_Edma3CmdIntr regionIntr;
CSL_Edma3ChannelHandle hChannel;
CSL_Edma3ParamSetup myParamSetup;
CSL_Edma3Context context;
CSL_Edma3ChannelAttr chAttr;
CSL_Status status;
Uint32 loopIndex;
/* Start the EDMA PING-PONG test over the Global Region. */
printf ("Debug: Testing EDMA(%d) Ping-Pong Test (Global) Region for Channel %d...\n", instNum, channelNum);
/* Initialize data */
for (loopIndex = 0; loopIndex < 256; loopIndex++)
{
srcBuff1[loopIndex] = loopIndex;
srcBuff2[loopIndex] = loopIndex;
dstBuff1[loopIndex] = 0;
dstBuff2[loopIndex] = 0;
}
/* Module initialization */
if (CSL_edma3Init(&context) != CSL_SOK)
{
printf ("Error: EDMA module initialization failed\n");
return -1;
}
/* Open the EDMA Module using the provided instance number */
hModule = CSL_edma3Open(&edmaObj, instNum, NULL, &status);
if ( (hModule == NULL) || (status != CSL_SOK))
{
printf ("Error: EDMA module open failed\n");
return -1;
}
/* Channel open */
chAttr.regionNum = CSL_EDMA3_REGION_GLOBAL;
chAttr.chaNum = channelNum;
hChannel = CSL_edma3ChannelOpen(&chObj, instNum, &chAttr, &status);
if ((hChannel == NULL) || (status != CSL_SOK))
{
printf ("Error: Unable to open EDMA Channel:%d\n", channelNum);
return -1;
}
if(!instNum)
{
/* For first EDMA instance there are only 2 TCs and 2 event queues
* Modify the channel default queue setup from 0 to 1
*/
if (CSL_edma3HwChannelSetupQue(hChannel,CSL_EDMA3_QUE_1) != CSL_SOK)
{
printf ("Error: EDMA channel setup queue failed\n");
return -1;
}
}
else
{
/* For EDMA instance 1 and 2 maximum of 4 TCs and 4 event queues are supported
* Change Channel Default queue setup from 0 to 3
*/
if (CSL_edma3HwChannelSetupQue(hChannel,CSL_EDMA3_QUE_3) != CSL_SOK)
{
printf ("Error: EDMA channel setup queue failed\n");
return -1;
}
}
/* Map the DMA Channel to PARAM Block 2. */
CSL_edma3MapDMAChannelToParamBlock (hModule, channelNum, 2);
/* Obtain a handle to parameter set 2 */
hParamPing = CSL_edma3GetParamHandle(hChannel, 2, &status);
if (hParamPing == NULL)
{
printf ("Error: EDMA Get Parameter Entry failed for 2.\n");
return -1;
}
/* Obtain a handle to parameter set 1 */
hParamPong = CSL_edma3GetParamHandle(hChannel, 1, &status);
if (hParamPong == NULL)
{
printf ("Error: EDMA Get Parameter Entry failed for 1.\n");
return -1;
}
/* Setup the parameter entry parameters (Ping buffer) */
myParamSetup.option = CSL_EDMA3_OPT_MAKE(CSL_EDMA3_ITCCH_DIS, \
CSL_EDMA3_TCCH_DIS, \
CSL_EDMA3_ITCINT_DIS, \
CSL_EDMA3_TCINT_EN, \
0, CSL_EDMA3_TCC_NORMAL,\
CSL_EDMA3_FIFOWIDTH_NONE, \
CSL_EDMA3_STATIC_DIS, \
CSL_EDMA3_SYNC_A, \
CSL_EDMA3_ADDRMODE_INCR, \
CSL_EDMA3_ADDRMODE_INCR );
myParamSetup.srcAddr = (Uint32)srcBuff1;
myParamSetup.aCntbCnt = CSL_EDMA3_CNT_MAKE(256,1);
myParamSetup.dstAddr = (Uint32)dstBuff1;
myParamSetup.srcDstBidx = CSL_EDMA3_BIDX_MAKE(1,1);
myParamSetup.linkBcntrld= CSL_EDMA3_LINKBCNTRLD_MAKE(hParamPong,0);
myParamSetup.srcDstCidx = CSL_EDMA3_CIDX_MAKE(0,1);
myParamSetup.cCnt = 1;
/* Ping setup */
if (CSL_edma3ParamSetup(hParamPing,&myParamSetup) != CSL_SOK)
{
printf ("Error: EDMA Parameter Entry Setup failed\n");
return -1;
}
/* Pong setup */
myParamSetup.linkBcntrld = CSL_EDMA3_LINKBCNTRLD_MAKE(hParamPing,0);
myParamSetup.option = CSL_EDMA3_OPT_MAKE(CSL_EDMA3_ITCCH_DIS, \
CSL_EDMA3_TCCH_DIS, \
CSL_EDMA3_ITCINT_DIS, \
CSL_EDMA3_TCINT_EN,\
1, CSL_EDMA3_TCC_NORMAL,\
CSL_EDMA3_FIFOWIDTH_NONE, \
CSL_EDMA3_STATIC_EN, \
CSL_EDMA3_SYNC_A, \
CSL_EDMA3_ADDRMODE_INCR, \
CSL_EDMA3_ADDRMODE_INCR );
myParamSetup.srcAddr = (Uint32)srcBuff2;
myParamSetup.dstAddr = (Uint32)dstBuff2;
if (CSL_edma3ParamSetup(hParamPong,&myParamSetup) != CSL_SOK)
{
printf ("Error: EDMA Parameter Entry Setup failed\n");
return -1;
}
/* Interrupt enable (Bits 0-1) for the global region interrupts */
regionIntr.region = CSL_EDMA3_REGION_GLOBAL;
regionIntr.intr = 0x3;
regionIntr.intrh = 0x0000;
CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTR_ENABLE,®ionIntr);
/* Trigger channel */
CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_SET,NULL);
regionIntr.region = CSL_EDMA3_REGION_GLOBAL;
regionIntr.intr = 0;
regionIntr.intrh = 0;
/* Poll on IPR bit 0 */
do {
CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INTRPEND,®ionIntr);
} while (!(regionIntr.intr & 0x1));
/* Clear the pending bit */
CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTRPEND_CLEAR,®ionIntr);
/* Trigger Channel */
CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_SET,NULL);
/* Poll on IPR bit 2 */
do {
CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INTRPEND,®ionIntr);
} while (!(regionIntr.intr & 0x2));
/* Check transfer by comparing the source and destination buffers */
if(Verify_Transfer( 256, 1, 1, 0, 0, 0, 0, srcBuff1, dstBuff1, TRUE) == FALSE)
{
printf ("Error: Verification (Source1/Destination1) Failed\n");
return -1;
}
if(Verify_Transfer( 256, 1, 1, 0, 0, 0, 0, srcBuff2, dstBuff2, TRUE) == FALSE)
{
printf ("Error: Verification (Source2/Destination2) Failed\n");
return -1;
}
/* Close channel */
if (CSL_edma3ChannelClose(hChannel) != CSL_SOK)
{
printf("Error: EDMA Channel Close failed\n");
return -1;
}
/* Close EDMA module */
if (CSL_edma3Close(hModule) != CSL_SOK)
{
printf("Error: EDMA Module Close failed\n");
return -1;
}
/* The test passed. */
return 0;
}
/**
* @b Description
* @n
* This is the example routine which performs the EDMA ping pong buffer transfer in
* the specified SHADOW Region.
*
* It implements following steps
* - Intializes and Opens the EDMA Module .
* - Sets up the interrupt for the EDMA SHADOW region.
* - Opens the channel 'channelNum' get the param handle for PARAM 1, 2
* - PING is mapped to PARAM Entry 1
* - PONG is mapped to PARAM Entry 2
* - PING is Linked with PONG...
* - Enables the EDMA interrupts for the specific SHADOW Region.
* - Manually triggers the DMA channel 'channelNum'(This should be PING)
* - Polls on IPR bit 0 (Since TCC for PING is 0)
* - Clear the pending bit
* - Manually triggers the channel 'channelNum' (This should be PONG)
* - Polls on IPR bit 1 (Since TCC for PONG is 1)
* - Clears the pending bit
* - Compares the data in the destination buffer is proper or not.
* - Closes the EDMA module and channel.
*
* @param[in] instNum
* EDMA Instance Number on which the test is executed.
* @param[in] channelNum
* EDMA Channel Number on which the test is executed
* @param[in] regionNum
* Shadown Region Number on which the test is executed.
*
* @retval
* Success - 0
* @retval
* Failure - <0
*/
static Int32 edma_ping_pong_xfer_region (Int32 instNum, Uint8 channelNum, Int32 regionNum)
{
CSL_Edma3Handle hModule;
CSL_Edma3Obj edmaObj;
CSL_Edma3ParamHandle hParamPing;
CSL_Edma3ParamHandle hParamPong;
CSL_Edma3ChannelObj chObj;
CSL_Edma3CmdIntr regionIntr;
CSL_Edma3CmdDrae regionAccess;
CSL_Edma3ChannelHandle hChannel;
CSL_Edma3ParamSetup myParamSetup;
CSL_Edma3Context context;
CSL_Edma3ChannelAttr chAttr;
CSL_Status status;
Uint32 loopIndex;
/* Start the EDMA PING-PONG test over the Shadow Region. */
printf ("Debug: Testing EDMA(%d) Ping-Pong Test Shadow-Region %d for Channel %d...\n", instNum, regionNum, channelNum);
/* Module Initialization */
if (CSL_edma3Init(&context) != CSL_SOK)
{
printf ("Error: EDMA module initialization failed\n");
return -1;
}
/* Module level open */
hModule = CSL_edma3Open(&edmaObj, instNum, NULL, &status);
if ((hModule == NULL) || (status != CSL_SOK))
{
printf ("Error: EDMA module open failed\n");
return -1;
}
/* Determine the number of channels we need to enable. Is this Instance 0? */
if (instNum == 0)
{
/* YES. DRAE enable(Bits 0-15) for the shadow region; since there are 16 channels. */
regionAccess.region = regionNum;
regionAccess.drae = 0xFFFF;
regionAccess.draeh = 0x0;
if (CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_DMAREGION_ENABLE, ®ionAccess) != CSL_SOK)
{
printf ("Error: EDMA region enable command failed\n");
return -1;
}
}
else
{
/* YES. DRAE enable(Bits 0-63) for the shadow region; since there are 64 channels. */
regionAccess.region = regionNum;
regionAccess.drae = 0xFFFFFFFF;
regionAccess.draeh = 0xFFFFFFFF;
if (CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_DMAREGION_ENABLE, ®ionAccess) != CSL_SOK)
{
printf ("Error: EDMA region enable command failed\n");
return -1;
}
}
/* Interrupt enable (Bits 0-11) for the shadow region 5 */
regionIntr.region = regionNum;
regionIntr.intr = 0x0FFF;
regionIntr.intrh = 0x0000;
if (CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTR_ENABLE, ®ionIntr) != CSL_SOK)
{
printf ("Error: EDMA interrupts enable command failed\n");
return -1;
}
/* Open the channel in context of the specified region number. */
chAttr.regionNum = regionNum;
chAttr.chaNum = channelNum;
hChannel = CSL_edma3ChannelOpen(&chObj, instNum, &chAttr, &status);
if ((hChannel == NULL) || (status != CSL_SOK))
{
printf ("Error: EDMA channel open failed\n");
return -1;
}
/* Map the DMA Channel to the appropriate PARAM Block. We start with PING
* which is located at PARAM Block 2. */
if (CSL_edma3HwChannelSetupParam(hChannel, 2) != CSL_SOK)
{
printf ("Error: EDMA channel setup param failed\n");
return -1;
}
/* Obtain a handle to parameter set 2 */
hParamPing = CSL_edma3GetParamHandle(hChannel, 2, &status);
if (hParamPing == NULL) {
printf ("Error: EDMA get param handle for param entry 2 failed\n");
return -1;
}
/* Obtain a handle to parameter set 1 */
hParamPong = CSL_edma3GetParamHandle(hChannel, 1, &status);
if (hParamPong == NULL) {
printf ("Error: EDMA get param handle for param entry 1 failed\n");
return -1;
}
/* Setup the first param set (Ping buffer) */
myParamSetup.option = CSL_EDMA3_OPT_MAKE( CSL_EDMA3_ITCCH_DIS, \
CSL_EDMA3_TCCH_DIS, \
CSL_EDMA3_ITCINT_DIS, \
CSL_EDMA3_TCINT_EN,\
0, CSL_EDMA3_TCC_NORMAL,\
CSL_EDMA3_FIFOWIDTH_NONE, \
CSL_EDMA3_STATIC_DIS, \
CSL_EDMA3_SYNC_A, \
CSL_EDMA3_ADDRMODE_INCR, \
CSL_EDMA3_ADDRMODE_INCR
);
myParamSetup.srcAddr = (Uint32)srcBuff1;
myParamSetup.aCntbCnt = CSL_EDMA3_CNT_MAKE(512,1);
myParamSetup.dstAddr = (Uint32)dstBuff1;
myParamSetup.srcDstBidx = CSL_EDMA3_BIDX_MAKE(1,1);
myParamSetup.linkBcntrld= CSL_EDMA3_LINKBCNTRLD_MAKE(hParamPong,0);
myParamSetup.srcDstCidx = CSL_EDMA3_CIDX_MAKE(0,1);
myParamSetup.cCnt = 1;
/* Setup the Ping Entry which loaded after the Pong entry gets exhausted */
if (CSL_edma3ParamSetup(hParamPing,&myParamSetup) != CSL_SOK)
{
printf("Error: EDMA ping parameter entry setup is failed\n");
return -1;
}
/* Setup the Pong Entry which loaded after the Ping entry gets exhausted */
myParamSetup.option = CSL_EDMA3_OPT_MAKE( CSL_EDMA3_ITCCH_DIS, \
CSL_EDMA3_TCCH_DIS, \
CSL_EDMA3_ITCINT_DIS, \
CSL_EDMA3_TCINT_EN, \
1,CSL_EDMA3_TCC_NORMAL, \
CSL_EDMA3_FIFOWIDTH_NONE, \
TRUE,CSL_EDMA3_SYNC_A, \
CSL_EDMA3_ADDRMODE_INCR, \
CSL_EDMA3_ADDRMODE_INCR
);
myParamSetup.srcAddr = (Uint32)srcBuff2;
myParamSetup.dstAddr = (Uint32)dstBuff2;
myParamSetup.linkBcntrld = CSL_EDMA3_LINKBCNTRLD_MAKE(hParamPing,0);
if (CSL_edma3ParamSetup(hParamPong,&myParamSetup) != CSL_SOK)
{
printf("Error: EDMA pong parameter entry setup is failed\n");
return -1;
}
/* Enable channel */
if (CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_ENABLE, NULL) != CSL_SOK)
{
printf("Error: EDMA channel enable command is failed\n");
return -1;
}
/* Initialize data */
for (loopIndex = 0; loopIndex < 512; loopIndex++) {
srcBuff1[loopIndex] = loopIndex;
srcBuff2[loopIndex] = loopIndex;
dstBuff1[loopIndex] = 0;
dstBuff2[loopIndex] = 0;
}
/* Manually trigger the channel */
if (CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_SET,NULL) != CSL_SOK)
{
printf("Error: EDMA channel set command is failed\n");
return -1;
}
regionIntr.region = regionNum;
regionIntr.intr = 0;
regionIntr.intrh = 0;
do {
/* Poll on interrupt bit 0 */
CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INTRPEND,®ionIntr);
} while (!(regionIntr.intr & 0x1));
/* Clear interrupt bit 0 */
if (CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTRPEND_CLEAR, ®ionIntr) != CSL_SOK)
{
printf("Error: EDMA clear interrupt bit 0 command is failed\n");
return -1;
}
/* Mapping channel 0 to event queue 1 */
if (CSL_edma3HwChannelSetupQue(hChannel,CSL_EDMA3_QUE_1) != CSL_SOK)
{
printf("Error: EDMA channel setup queue is failed\n");
return -1;
}
/* Manually trigger the channel */
if (CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_SET,NULL) != CSL_SOK)
{
printf("Error: EDMA channel set command is failed\n");
return -1;
}
regionIntr.region = regionNum;
regionIntr.intr = 0;
regionIntr.intrh = 0;
/* Poll on interrupt pend bit 1 */
do {
CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INTRPEND,®ionIntr);
} while (!(regionIntr.intr & 0x2));
/* Clear interrupt bit 1 */
if (CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTRPEND_CLEAR, ®ionIntr) != CSL_SOK)
{
printf("Error: EDMA clear interrupt bit 1 command is failed\n");
return -1;
}
/* Verify the data has been transferred correctly. */
if(Verify_Transfer(512, 1, 1, 0, 0, 0, 0, srcBuff1, dstBuff1,TRUE) == FALSE)
{
printf ("Error: Verification (Source1/Destination1) Failed\n");
return -1;
}
if(Verify_Transfer(512, 1, 1, 0, 0, 0, 0, srcBuff2, dstBuff2,TRUE) == FALSE)
{
printf ("Error: Verification (Source2/Destination2) Failed\n");
return -1;
}
/* Close channel */
if (CSL_edma3ChannelClose(hChannel) != CSL_SOK)
{
printf("Error: EDMA channel close failed\n");
return -1;
}
/* Close EDMA module */
if (CSL_edma3Close(hModule) != CSL_SOK)
{
printf("Error: EDMA module close failed\n");
return -1;
}
/* Test Passed. */
return 0;
}
/**
* @b Description
* @n
* Entry point for the test code.
*
* @retval
* Not Applicable.
*/
void dma_test_main (void)
{
Uint8 channelNum;
Int32 regionNum;
Uint8 instNum = 2;
printf ("**************************************************\n");
printf ("******************* EDMA Testing *****************\n");
printf ("**************************************************\n");
/* EDMA Instance 0: Supports only 16 DMA Channels. */
for (channelNum = 0; channelNum < 16; channelNum++)
{
if (edma_ping_pong_xfer_gbl_region(instNum, channelNum) < 0)
{
printf ("Error: Testing EDMA(%d) Ping-Pong Test (Global) Region for Channel %d FAILED\n", instNum, channelNum);
return;
}
printf ("Debug: Testing EDMA(%d) Ping-Pong Test (Global) Region for Channel %d Passed\n", instNum, channelNum);
}
/* EDMA Shadow Testing: This is run for all the SHADOW Regions from 0-7
* and on all supported DMA Channels. */
for (regionNum = CSL_EDMA3_REGION_0; regionNum <= CSL_EDMA3_REGION_7; regionNum++)
{
for (channelNum = 0; channelNum < 16; channelNum++)
{
if (edma_ping_pong_xfer_region(instNum, channelNum, regionNum) < 0)
{
printf ("Error: Testing EDMA(%d) Ping-Pong Test Shadow-Region %d for Channel %d FAILED\n",
instNum, regionNum, channelNum);
return;
}
printf ("Debug: Testing EDMA(%d) Ping-Pong Test Shadow-Region %d for Channel %d Passed\n",
instNum, regionNum, channelNum);
}
}
/* QDMA Testing: This is run for all SHADOW Regions from 0-7 and on
* all supported QDMA Channels; there are 8 supported. Remember QDMA Channels start after the
* DMA Channels which are 16 for Instance 0. */
for (regionNum = CSL_EDMA3_REGION_GLOBAL; regionNum <= CSL_EDMA3_REGION_7; regionNum++)
{
for (channelNum = 16; channelNum < 24; channelNum++)
{
if (qdma_link_xfer_region(instNum, channelNum, regionNum) < 0)
{
printf ("Error: Testing EDMA(%d) Ping-Pong Test (Shadow) Region %d for QDMA Channel %d FAILED\n",
instNum, regionNum, channelNum);
return;
}
printf ("Debug: Testing EDMA(%d) Ping-Pong Test (Shadow) Region %d for QDMA Channel %d Passed\n",
instNum, regionNum, channelNum);
}
}
/* Run the test for EDMA Instance 1 and 2; both have the same limits. */
for (instNum = 1; instNum < 3; instNum++)
{
/* EDMA Instance 1 and 2: Supports 64 DMA Channels. */
for (channelNum = 0; channelNum < 64; channelNum++)
{
if (edma_ping_pong_xfer_gbl_region(instNum, channelNum) < 0)
{
printf ("Error: Testing EDMA(%d) Ping-Pong Test (Global) Region for Channel %d FAILED\n",
instNum, channelNum);
return;
}
printf ("Debug: Testing EDMA(%d) Ping-Pong Test (Global) Region for Channel %d Passed\n",
instNum, channelNum);
}
/* EDMA Shadow Testing: This is run for all the SHADOW Regions from 0-7
* and on all supported DMA Channels. */
for (regionNum = CSL_EDMA3_REGION_0; regionNum <= CSL_EDMA3_REGION_7; regionNum++)
{
for (channelNum = 0; channelNum < 64; channelNum++)
{
if (edma_ping_pong_xfer_region(instNum, channelNum, regionNum) < 0)
{
printf ("Error: Testing EDMA(%d) Ping-Pong Test Shadow-Region %d for Channel %d FAILED\n",
instNum, regionNum, channelNum);
return;
}
printf ("Debug: Testing EDMA(%d) Ping-Pong Test Shadow-Region %d for Channel %d Passed\n",
instNum, regionNum, channelNum);
}
}
/* QDMA Testing: This is run for all SHADOW Regions from 0-7 and on
* all supported QDMA Channels; there are 8 supported. Remember QDMA Channels start after the
* DMA Channels which are 64 for Instance 1 and 2 */
for (regionNum = CSL_EDMA3_REGION_GLOBAL; regionNum <= CSL_EDMA3_REGION_7; regionNum++)
{
for (channelNum = 64; channelNum < 72; channelNum++)
{
if (qdma_link_xfer_region(instNum, channelNum, regionNum) < 0)
{
printf ("Error: Testing EDMA(%d) Ping-Pong Test (Shadow) Region %d for QDMA Channel %d FAILED\n",
instNum, regionNum, channelNum);
return;
}
printf ("Debug: Testing EDMA(%d) Ping-Pong Test (Shadow) Region %d for QDMA Channel %d Passed\n",
instNum, regionNum, channelNum);
}
}
}
printf ("**************************************************\n");
printf ("************* EDMA Testing Successful ************\n");
printf ("**************************************************\n");
return;
}
What might be the problem? Thank you.
Regards,
Steve
Steven,
I found that my buffers are in L2. After I convert them to global addresses, the DMA copy works.
But there are still some error outputs. I will step through the code and let you know.
Thanks a lot for the support.
Regards,
Steve
Steven,
QDMA tests have problems. IPR bit is not set. So it polls forever.
Thank you.
Regards,
Steve
/**
* @file edma_test.c
*
* @brief
* This is the Example test code for the EDMA CSL Functional layer.
*
* \par
* NOTE:
* (C) Copyright 2009 Texas Instruments, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include <stdio.h>
#include <ti/csl/csl_edma3.h>
#include <ti/csl/csl_edma3Aux.h>
#include <ti/csl/csl_cacheAux.h>
/**********************************************************************
************************** Global Variables **************************
**********************************************************************/
/* Global Variables which are used to dump the TPCC register overlay in the
* debugger... */
//CSL_TpccRegs* gEDMACC0Regs = (CSL_TpccRegs*)CSL_EDMA0CC_REGS;
//CSL_TpccRegs* gEDMACC1Regs = (CSL_TpccRegs*)CSL_EDMA1CC_REGS;
//CSL_TpccRegs* gEDMACC2Regs = (CSL_TpccRegs*)CSL_EDMA2CC_REGS;
Uint32 global_address(Uint32 addr);
/* Global Buffers (Source and Destination) for PING-PONG */
Uint8 srcBuff1[512];
Uint8 srcBuff2[512];
Uint8 dstBuff1[512];
Uint8 dstBuff2[512];
/**********************************************************************
************************ EDMA TEST FUNCTIONS *************************
**********************************************************************/
/**
* @b Description
* @n
* This is utility function used by the EDMA example to verify the
* Data transfer.
*
* @retval
* Success - TRUE
* @retval
* Error - FALSE
*/
static Bool Verify_Transfer
(
Uint16 aCnt,
Uint16 bCnt,
Uint16 cCnt,
Uint16 srcBIdx,
Uint16 dstBIdx,
Uint16 srcCIdx,
Uint16 dstCIdx,
Uint8 *srcBuff,
Uint8 *dstBuff,
Bool abSync
)
{
Uint32 loopIndex1;
Uint32 loopIndex2;
Uint32 loopIndex3;
Uint8* srcArrayPtr = (Uint8*)srcBuff;
Uint8* dstArrayPtr = (Uint8*)dstBuff;
Uint8* srcFramePtr = (Uint8*)srcBuff;
Uint8* dstFramePtr = (Uint8*)dstBuff;
Uint16 key;
/* Invalidate the cache before verification */
/* Disable Interrupts */
key = _disable_interrupts();
CACHE_invL1d ((void *)srcBuff, 512, CACHE_WAIT);
CACHE_invL2 ((void *)srcBuff, 512, CACHE_WAIT);
CACHE_invL1d ((void *)dstBuff, 512, CACHE_WAIT);
CACHE_invL2 ((void *)dstBuff, 512, CACHE_WAIT);
_mfence();
/* Re-enable Interrupts. */
_restore_interrupts(key);
for (loopIndex1 = 0; loopIndex1 < cCnt; loopIndex1++) {
for (loopIndex2 = 0; loopIndex2 < bCnt; loopIndex2++) {
for (loopIndex3 = 0; loopIndex3 < aCnt; loopIndex3++)
if (srcArrayPtr[loopIndex3] != dstArrayPtr[loopIndex3])
return FALSE;
srcArrayPtr = srcArrayPtr + srcBIdx;
dstArrayPtr = dstArrayPtr + dstBIdx;
}
if (abSync) {
srcFramePtr = srcFramePtr + srcCIdx;
srcArrayPtr = srcFramePtr;
dstFramePtr = dstFramePtr + dstCIdx;
dstArrayPtr = dstFramePtr;
}
else {
srcFramePtr = srcArrayPtr + srcCIdx - srcBIdx;
srcArrayPtr = srcFramePtr;
dstFramePtr = dstArrayPtr + dstCIdx - dstBIdx;
dstArrayPtr = dstFramePtr;
}
}
return TRUE;
}
/**
* @b Description
* @n
* This is the example routine which perform EDMA ping pong buffer transfer
* using a QDMA Channel.
* It implements following steps:-
* - Initializes and Opens the EDMA module
* - Sets up the Module and gets the module setup values
* - Enables the DMA and QDMA regions
* - Opens the specified QDMA channel 'channelNum'
* - PING uses PARAM Entry 1
* - PONG uses PARAM Entry 2
* - Configures the PARAM Blocks.
* - Enables the channel
* - Initiates the QDMA Transfer by setting the Trigger Word.
* - Poll on the IPR bit
* - Clear the pending bit
* - Compares the transfered data
* - Closes EDMA module
*
* @param[in] instNum
* EDMA Instance Number on which the test is executed.
* @param[in] channelNum
* EDMA Channel Number on which the test is executed
*
* @retval
* Success - 0
* @retval
* Failure - <0
*/
static Int32 qdma_link_xfer_region (Int32 instNum, Uint8 channelNum, Int32 regionNum)
{
CSL_Edma3Handle hModule;
CSL_Edma3Obj edmaObj;
CSL_Edma3ParamHandle hParamPong,hParamPing;
CSL_Edma3ChannelObj chObj;
CSL_Edma3CmdIntr regionIntr;
CSL_Edma3CmdDrae regionAccess;
CSL_Edma3ChannelHandle hChannel;
CSL_Edma3ParamSetup myParamSetup;
CSL_Edma3Context context;
CSL_Edma3ChannelAttr chAttr;
CSL_Edma3CmdQrae qraeSetup;
CSL_Status status;
Uint32 loopIndex;
/* Start the EDMA PING-PONG test over the SHADOW Region. */
printf ("Debug: Testing EDMA(%d) Ping-Pong Test (Shadow) Region %d for QDMA Channel %d...\n",
instNum, regionNum, channelNum);
/* Initialize data */
for (loopIndex = 0; loopIndex < 256; loopIndex++) {
srcBuff1[loopIndex] = loopIndex;
srcBuff2[loopIndex] = loopIndex;
dstBuff1[loopIndex] = 0;
dstBuff2[loopIndex] = 0;
}
/* Module initialization */
if (CSL_edma3Init(&context) != CSL_SOK)
{
printf ("Error: EDMA module initialization failed\n");
return -1;
}
/* Module level open */
hModule = CSL_edma3Open(&edmaObj,instNum,NULL,&status);
if ((hModule == NULL) || (status != CSL_SOK))
{
printf ("Error: EDMA module open failed\n");
return -1;
}
/* Is this for GLOBAL or SHADOW Region */
if (regionNum != CSL_EDMA3_REGION_GLOBAL)
{
/* Shadow Region: Enable DRAE enable(Bits 0-15) it. */
regionAccess.region = regionNum;
regionAccess.drae = 0xFFFF;
regionAccess.draeh = 0x0000;
if (CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_DMAREGION_ENABLE, ®ionAccess) != CSL_SOK)
{
printf ("Error: EDMA region enable command failed\n");
return -1;
}
/* Enable access for all QDMA channels in the SHADOW Region. */
qraeSetup.region = regionNum;
qraeSetup.qrae = 0xFF;
if (CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_QDMAREGION_ENABLE, &qraeSetup) != CSL_SOK)
{
printf ("Error: EDMA QDMA region enable command failed\n");
return -1;
}
}
/* QDMA Channel Open */
chAttr.regionNum = regionNum;
chAttr.chaNum = channelNum;
hChannel = CSL_edma3ChannelOpen(&chObj, instNum, &chAttr, &status);
if ((hChannel == NULL) || (status != CSL_SOK))
{
printf ("Error: EDMA channel open failed\n");
return -1;
}
/* Map QDMA Channel to the PING Param Block i.e. 1 */
CSL_edma3HwChannelSetupParam (hChannel, 1);
/* Setup the trigger word for the QDMA Channel. */
CSL_edma3HwChannelSetupTriggerWord(hChannel, 7);
/* PING Parameter Entry Handle */
hParamPing = CSL_edma3GetParamHandle(hChannel, 1, &status);
if (hParamPing == NULL)
{
printf ("Error: EDMA get handle for param entry 1 failed\n");
return -1;
}
/* PONG Parameter Entry Handle */
hParamPong = CSL_edma3GetParamHandle(hChannel, 2, &status);
if (hParamPong == NULL)
{
printf ("Error: EDMA get handle for param entry 2 failed\n");
return -1;
}
/* Setup param entry */
myParamSetup.option = CSL_EDMA3_OPT_MAKE(CSL_EDMA3_ITCCH_DIS, \
CSL_EDMA3_TCCH_DIS, \
CSL_EDMA3_ITCINT_DIS, \
CSL_EDMA3_TCINT_DIS,\
0,CSL_EDMA3_TCC_NORMAL,\
CSL_EDMA3_FIFOWIDTH_NONE, \
CSL_EDMA3_STATIC_DIS, \
CSL_EDMA3_SYNC_A, \
CSL_EDMA3_ADDRMODE_INCR, \
CSL_EDMA3_ADDRMODE_INCR);
myParamSetup.srcAddr = (Uint32)global_address((Uint32)srcBuff1);
myParamSetup.aCntbCnt = CSL_EDMA3_CNT_MAKE(256,1);
myParamSetup.dstAddr = (Uint32)global_address((Uint32)dstBuff1);
myParamSetup.srcDstBidx = CSL_EDMA3_BIDX_MAKE(1,1);
myParamSetup.linkBcntrld= CSL_EDMA3_LINKBCNTRLD_MAKE(hParamPong,0);
myParamSetup.srcDstCidx = CSL_EDMA3_CIDX_MAKE(0,1);
myParamSetup.cCnt = 1;
/* Setup PING to operate with this PARAM Entry. */
if (CSL_edma3ParamSetup(hParamPing, &myParamSetup) != CSL_SOK)
{
printf ("Error: EDMA param setup failed\n");
return -1;
}
/* Setting up the next entry */
myParamSetup.option = CSL_EDMA3_OPT_MAKE(CSL_EDMA3_ITCCH_DIS, \
CSL_EDMA3_TCCH_DIS, \
CSL_EDMA3_ITCINT_DIS, \
CSL_EDMA3_TCINT_EN,\
1,CSL_EDMA3_TCC_NORMAL,\
CSL_EDMA3_FIFOWIDTH_NONE, \
CSL_EDMA3_STATIC_EN, \
CSL_EDMA3_SYNC_A, \
CSL_EDMA3_ADDRMODE_INCR, \
CSL_EDMA3_ADDRMODE_INCR);
myParamSetup.srcAddr = (Uint32)global_address((Uint32)srcBuff2);
myParamSetup.dstAddr = (Uint32)global_address((Uint32)dstBuff2);
/* Setup for the Pong buffer */
if (CSL_edma3ParamSetup(hParamPong,&myParamSetup) != CSL_SOK)
{
printf ("Error: EDMA param setup failed\n");
return -1;
}
/* Enable Channel */
if (CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_ENABLE, NULL) != CSL_SOK)
{
printf ("Error: EDMA channel enable command failed\n");
return -1;
}
/* Trigger the word by writing to the trigger word... */
if (CSL_edma3ParamWriteWord(hParamPing,7,1) != CSL_SOK) {
printf ("Error: EDMA param write word failed\n");
return -1;
}
/* Poll IPR bit */
regionIntr.region = regionNum;
do {
CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INTRPEND,®ionIntr);
} while (!(regionIntr.intr & 0x2));
/* Clear pending interrupt */
if (CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTRPEND_CLEAR, ®ionIntr) != CSL_SOK)
{
printf ("Error: EDMA clear interrupt pend command failed\n");
return -1;
}
/* Check transfer by comparing the source and destination buffers */
if(Verify_Transfer( 256, 1, 1, 0, 0, 0, 0, srcBuff1, dstBuff1,TRUE) == FALSE)
{
printf ("Error: Verification (Source1/Destination1) Failed\n");
return -1;
}
if(Verify_Transfer( 256, 1, 1, 0, 0, 0, 0, srcBuff2, dstBuff2,TRUE) == FALSE)
{
printf ("Error: Verification (Source2/Destination2) Failed\n");
return -1;
}
/* Disable the channel */
CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_DISABLE, NULL);
/* Close channel */
if (CSL_edma3ChannelClose(hChannel) != CSL_SOK)
{
printf("Error: EDMA channel close failed\n");
return -1;
}
/* Close EDMA module */
if (CSL_edma3Close(hModule) != CSL_SOK)
{
printf("Error: EDMA module close failed\n");
return -1;
}
/* Test Passed. */
return 0;
}
/**
* @b Description
* @n
* This is the example routine which perform EDMA ping pong buffer transfer
* where channel is open in the global region.
* It implements following steps
* - Intializes and Opens the EDMA Module .
* - Sets up the interrupt for the EDMA global region.
* - Sets up the EDMA module using the API csl_edma3Hwsetup ()
* - Enables the EDMA global region
* - Opens the channel 'channelNum' get the param handle for PARAM 1, 2
* - PING is mapped to PARAM Entry 1
* - PONG is mapped to PARAM Entry 2
* - PING is Linked with PONG...
* - Enables the EDMA interrupt using CSL_EDMA3_CMD_INTR_ENABLE.
* - Enables Interrupt (Bit 0-2) for the global region interrupts
* - Manually triggers the DMA channel 'channelNum'(This should be PING)
* - Polls on IPR bit 0 (Since TCC for PING is 0)
* - Clear the pending bit
* - Manually triggers the channel 'channelNum' (This should be PONG)
* - Polls on IPR bit 1 (Since TCC for PONG is 1)
* - Clears the pending bit
* - Compares the data in the destination buffer is proper or not.
* - Closes the EDMA module and channel.
*
* @param[in] instNum
* EDMA Instance Number on which the test is executed.
* @param[in] channelNum
* EDMA Channel Number on which the test is executed
*
* @retval
* Success - 0
* @retval
* Failure - <0
*/
static Int32 edma_ping_pong_xfer_gbl_region (Int32 instNum, Uint8 channelNum)
{
CSL_Edma3Handle hModule;
CSL_Edma3Obj edmaObj;
CSL_Edma3ParamHandle hParamPing;
CSL_Edma3ParamHandle hParamPong;
CSL_Edma3ChannelObj chObj;
CSL_Edma3CmdIntr regionIntr;
CSL_Edma3ChannelHandle hChannel;
CSL_Edma3ParamSetup myParamSetup;
CSL_Edma3Context context;
CSL_Edma3ChannelAttr chAttr;
CSL_Status status;
Uint32 loopIndex;
/* Start the EDMA PING-PONG test over the Global Region. */
printf ("Debug: Testing EDMA(%d) Ping-Pong Test (Global) Region for Channel %d...\n", instNum, channelNum);
/* Initialize data */
for (loopIndex = 0; loopIndex < 256; loopIndex++)
{
srcBuff1[loopIndex] = loopIndex;
srcBuff2[loopIndex] = loopIndex;
dstBuff1[loopIndex] = 0;
dstBuff2[loopIndex] = 0;
}
/* Module initialization */
if (CSL_edma3Init(&context) != CSL_SOK)
{
printf ("Error: EDMA module initialization failed\n");
return -1;
}
/* Open the EDMA Module using the provided instance number */
hModule = CSL_edma3Open(&edmaObj, instNum, NULL, &status);
if ( (hModule == NULL) || (status != CSL_SOK))
{
printf ("Error: EDMA module open failed\n");
return -1;
}
/* Channel open */
chAttr.regionNum = CSL_EDMA3_REGION_GLOBAL;
chAttr.chaNum = channelNum;
hChannel = CSL_edma3ChannelOpen(&chObj, instNum, &chAttr, &status);
if ((hChannel == NULL) || (status != CSL_SOK))
{
printf ("Error: Unable to open EDMA Channel:%d\n", channelNum);
return -1;
}
if(!instNum)
{
/* For first EDMA instance there are only 2 TCs and 2 event queues
* Modify the channel default queue setup from 0 to 1
*/
if (CSL_edma3HwChannelSetupQue(hChannel,CSL_EDMA3_QUE_1) != CSL_SOK)
{
printf ("Error: EDMA channel setup queue failed\n");
return -1;
}
}
else
{
/* For EDMA instance 1 and 2 maximum of 4 TCs and 4 event queues are supported
* Change Channel Default queue setup from 0 to 3
*/
if (CSL_edma3HwChannelSetupQue(hChannel,CSL_EDMA3_QUE_3) != CSL_SOK)
{
printf ("Error: EDMA channel setup queue failed\n");
return -1;
}
}
/* Map the DMA Channel to PARAM Block 2. */
CSL_edma3MapDMAChannelToParamBlock (hModule, channelNum, 2);
/* Obtain a handle to parameter set 2 */
hParamPing = CSL_edma3GetParamHandle(hChannel, 2, &status);
if (hParamPing == NULL)
{
printf ("Error: EDMA Get Parameter Entry failed for 2.\n");
return -1;
}
/* Obtain a handle to parameter set 1 */
hParamPong = CSL_edma3GetParamHandle(hChannel, 1, &status);
if (hParamPong == NULL)
{
printf ("Error: EDMA Get Parameter Entry failed for 1.\n");
return -1;
}
/* Setup the parameter entry parameters (Ping buffer) */
myParamSetup.option = CSL_EDMA3_OPT_MAKE(CSL_EDMA3_ITCCH_DIS, \
CSL_EDMA3_TCCH_DIS, \
CSL_EDMA3_ITCINT_DIS, \
CSL_EDMA3_TCINT_EN, \
0, CSL_EDMA3_TCC_NORMAL,\
CSL_EDMA3_FIFOWIDTH_NONE, \
CSL_EDMA3_STATIC_DIS, \
CSL_EDMA3_SYNC_A, \
CSL_EDMA3_ADDRMODE_INCR, \
CSL_EDMA3_ADDRMODE_INCR );
myParamSetup.srcAddr = (Uint32)global_address((Uint32)srcBuff1);
myParamSetup.aCntbCnt = CSL_EDMA3_CNT_MAKE(256,1);
myParamSetup.dstAddr = (Uint32)global_address((Uint32)dstBuff1);
myParamSetup.srcDstBidx = CSL_EDMA3_BIDX_MAKE(1,1);
myParamSetup.linkBcntrld= CSL_EDMA3_LINKBCNTRLD_MAKE(hParamPong,0);
myParamSetup.srcDstCidx = CSL_EDMA3_CIDX_MAKE(0,1);
myParamSetup.cCnt = 1;
/* Ping setup */
if (CSL_edma3ParamSetup(hParamPing,&myParamSetup) != CSL_SOK)
{
printf ("Error: EDMA Parameter Entry Setup failed\n");
return -1;
}
/* Pong setup */
myParamSetup.linkBcntrld = CSL_EDMA3_LINKBCNTRLD_MAKE(hParamPing,0);
myParamSetup.option = CSL_EDMA3_OPT_MAKE(CSL_EDMA3_ITCCH_DIS, \
CSL_EDMA3_TCCH_DIS, \
CSL_EDMA3_ITCINT_DIS, \
CSL_EDMA3_TCINT_EN,\
1, CSL_EDMA3_TCC_NORMAL,\
CSL_EDMA3_FIFOWIDTH_NONE, \
CSL_EDMA3_STATIC_EN, \
CSL_EDMA3_SYNC_A, \
CSL_EDMA3_ADDRMODE_INCR, \
CSL_EDMA3_ADDRMODE_INCR );
myParamSetup.srcAddr = (Uint32)global_address((Uint32)srcBuff2);
myParamSetup.dstAddr = (Uint32)global_address((Uint32)dstBuff2);
if (CSL_edma3ParamSetup(hParamPong,&myParamSetup) != CSL_SOK)
{
printf ("Error: EDMA Parameter Entry Setup failed\n");
return -1;
}
/* Interrupt enable (Bits 0-1) for the global region interrupts */
regionIntr.region = CSL_EDMA3_REGION_GLOBAL;
regionIntr.intr = 0x3;
regionIntr.intrh = 0x0000;
CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTR_ENABLE,®ionIntr);
/* Trigger channel */
CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_SET,NULL);
regionIntr.region = CSL_EDMA3_REGION_GLOBAL;
regionIntr.intr = 0;
regionIntr.intrh = 0;
/* Poll on IPR bit 0 */
do {
CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INTRPEND,®ionIntr);
} while (!(regionIntr.intr & 0x1));
/* Clear the pending bit */
CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTRPEND_CLEAR,®ionIntr);
/* Trigger Channel */
CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_SET,NULL);
/* Poll on IPR bit 2 */
do {
CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INTRPEND,®ionIntr);
} while (!(regionIntr.intr & 0x2));
/* Check transfer by comparing the source and destination buffers */
if(Verify_Transfer( 256, 1, 1, 0, 0, 0, 0, srcBuff1, dstBuff1, TRUE) == FALSE)
{
printf ("Error: Verification (Source1/Destination1) Failed\n");
return -1;
}
if(Verify_Transfer( 256, 1, 1, 0, 0, 0, 0, srcBuff2, dstBuff2, TRUE) == FALSE)
{
printf ("Error: Verification (Source2/Destination2) Failed\n");
return -1;
}
/* Close channel */
if (CSL_edma3ChannelClose(hChannel) != CSL_SOK)
{
printf("Error: EDMA Channel Close failed\n");
return -1;
}
/* Close EDMA module */
if (CSL_edma3Close(hModule) != CSL_SOK)
{
printf("Error: EDMA Module Close failed\n");
return -1;
}
/* The test passed. */
return 0;
}
/**
* @b Description
* @n
* This is the example routine which performs the EDMA ping pong buffer transfer in
* the specified SHADOW Region.
*
* It implements following steps
* - Intializes and Opens the EDMA Module .
* - Sets up the interrupt for the EDMA SHADOW region.
* - Opens the channel 'channelNum' get the param handle for PARAM 1, 2
* - PING is mapped to PARAM Entry 1
* - PONG is mapped to PARAM Entry 2
* - PING is Linked with PONG...
* - Enables the EDMA interrupts for the specific SHADOW Region.
* - Manually triggers the DMA channel 'channelNum'(This should be PING)
* - Polls on IPR bit 0 (Since TCC for PING is 0)
* - Clear the pending bit
* - Manually triggers the channel 'channelNum' (This should be PONG)
* - Polls on IPR bit 1 (Since TCC for PONG is 1)
* - Clears the pending bit
* - Compares the data in the destination buffer is proper or not.
* - Closes the EDMA module and channel.
*
* @param[in] instNum
* EDMA Instance Number on which the test is executed.
* @param[in] channelNum
* EDMA Channel Number on which the test is executed
* @param[in] regionNum
* Shadown Region Number on which the test is executed.
*
* @retval
* Success - 0
* @retval
* Failure - <0
*/
static Int32 edma_ping_pong_xfer_region (Int32 instNum, Uint8 channelNum, Int32 regionNum)
{
CSL_Edma3Handle hModule;
CSL_Edma3Obj edmaObj;
CSL_Edma3ParamHandle hParamPing;
CSL_Edma3ParamHandle hParamPong;
CSL_Edma3ChannelObj chObj;
CSL_Edma3CmdIntr regionIntr;
CSL_Edma3CmdDrae regionAccess;
CSL_Edma3ChannelHandle hChannel;
CSL_Edma3ParamSetup myParamSetup;
CSL_Edma3Context context;
CSL_Edma3ChannelAttr chAttr;
CSL_Status status;
Uint32 loopIndex;
/* Start the EDMA PING-PONG test over the Shadow Region. */
printf ("Debug: Testing EDMA(%d) Ping-Pong Test Shadow-Region %d for Channel %d...\n", instNum, regionNum, channelNum);
/* Module Initialization */
if (CSL_edma3Init(&context) != CSL_SOK)
{
printf ("Error: EDMA module initialization failed\n");
return -1;
}
/* Module level open */
hModule = CSL_edma3Open(&edmaObj, instNum, NULL, &status);
if ((hModule == NULL) || (status != CSL_SOK))
{
printf ("Error: EDMA module open failed\n");
return -1;
}
/* Determine the number of channels we need to enable. Is this Instance 0? */
if (instNum == 0)
{
/* YES. DRAE enable(Bits 0-15) for the shadow region; since there are 16 channels. */
regionAccess.region = regionNum;
regionAccess.drae = 0xFFFF;
regionAccess.draeh = 0x0;
if (CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_DMAREGION_ENABLE, ®ionAccess) != CSL_SOK)
{
printf ("Error: EDMA region enable command failed\n");
return -1;
}
}
else
{
/* YES. DRAE enable(Bits 0-63) for the shadow region; since there are 64 channels. */
regionAccess.region = regionNum;
regionAccess.drae = 0xFFFFFFFF;
regionAccess.draeh = 0xFFFFFFFF;
if (CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_DMAREGION_ENABLE, ®ionAccess) != CSL_SOK)
{
printf ("Error: EDMA region enable command failed\n");
return -1;
}
}
/* Interrupt enable (Bits 0-11) for the shadow region 5 */
regionIntr.region = regionNum;
regionIntr.intr = 0x0FFF;
regionIntr.intrh = 0x0000;
if (CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTR_ENABLE, ®ionIntr) != CSL_SOK)
{
printf ("Error: EDMA interrupts enable command failed\n");
return -1;
}
/* Open the channel in context of the specified region number. */
chAttr.regionNum = regionNum;
chAttr.chaNum = channelNum;
hChannel = CSL_edma3ChannelOpen(&chObj, instNum, &chAttr, &status);
if ((hChannel == NULL) || (status != CSL_SOK))
{
printf ("Error: EDMA channel open failed\n");
return -1;
}
/* Map the DMA Channel to the appropriate PARAM Block. We start with PING
* which is located at PARAM Block 2. */
if (CSL_edma3HwChannelSetupParam(hChannel, 2) != CSL_SOK)
{
printf ("Error: EDMA channel setup param failed\n");
return -1;
}
/* Obtain a handle to parameter set 2 */
hParamPing = CSL_edma3GetParamHandle(hChannel, 2, &status);
if (hParamPing == NULL) {
printf ("Error: EDMA get param handle for param entry 2 failed\n");
return -1;
}
/* Obtain a handle to parameter set 1 */
hParamPong = CSL_edma3GetParamHandle(hChannel, 1, &status);
if (hParamPong == NULL) {
printf ("Error: EDMA get param handle for param entry 1 failed\n");
return -1;
}
/* Setup the first param set (Ping buffer) */
myParamSetup.option = CSL_EDMA3_OPT_MAKE( CSL_EDMA3_ITCCH_DIS, \
CSL_EDMA3_TCCH_DIS, \
CSL_EDMA3_ITCINT_DIS, \
CSL_EDMA3_TCINT_EN,\
0, CSL_EDMA3_TCC_NORMAL,\
CSL_EDMA3_FIFOWIDTH_NONE, \
CSL_EDMA3_STATIC_DIS, \
CSL_EDMA3_SYNC_A, \
CSL_EDMA3_ADDRMODE_INCR, \
CSL_EDMA3_ADDRMODE_INCR
);
myParamSetup.srcAddr = (Uint32)global_address((Uint32)srcBuff1);
myParamSetup.aCntbCnt = CSL_EDMA3_CNT_MAKE(512,1);
myParamSetup.dstAddr = (Uint32)global_address((Uint32)dstBuff1);
myParamSetup.srcDstBidx = CSL_EDMA3_BIDX_MAKE(1,1);
myParamSetup.linkBcntrld= CSL_EDMA3_LINKBCNTRLD_MAKE(hParamPong,0);
myParamSetup.srcDstCidx = CSL_EDMA3_CIDX_MAKE(0,1);
myParamSetup.cCnt = 1;
/* Setup the Ping Entry which loaded after the Pong entry gets exhausted */
if (CSL_edma3ParamSetup(hParamPing,&myParamSetup) != CSL_SOK)
{
printf("Error: EDMA ping parameter entry setup is failed\n");
return -1;
}
/* Setup the Pong Entry which loaded after the Ping entry gets exhausted */
myParamSetup.option = CSL_EDMA3_OPT_MAKE( CSL_EDMA3_ITCCH_DIS, \
CSL_EDMA3_TCCH_DIS, \
CSL_EDMA3_ITCINT_DIS, \
CSL_EDMA3_TCINT_EN, \
1,CSL_EDMA3_TCC_NORMAL, \
CSL_EDMA3_FIFOWIDTH_NONE, \
TRUE,CSL_EDMA3_SYNC_A, \
CSL_EDMA3_ADDRMODE_INCR, \
CSL_EDMA3_ADDRMODE_INCR
);
myParamSetup.srcAddr = (Uint32)global_address((Uint32)srcBuff2);
myParamSetup.dstAddr = (Uint32)global_address((Uint32)dstBuff2);
myParamSetup.linkBcntrld = CSL_EDMA3_LINKBCNTRLD_MAKE(hParamPing,0);
if (CSL_edma3ParamSetup(hParamPong,&myParamSetup) != CSL_SOK)
{
printf("Error: EDMA pong parameter entry setup is failed\n");
return -1;
}
/* Enable channel */
if (CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_ENABLE, NULL) != CSL_SOK)
{
printf("Error: EDMA channel enable command is failed\n");
return -1;
}
/* Initialize data */
for (loopIndex = 0; loopIndex < 512; loopIndex++) {
srcBuff1[loopIndex] = loopIndex;
srcBuff2[loopIndex] = loopIndex;
dstBuff1[loopIndex] = 0;
dstBuff2[loopIndex] = 0;
}
/* Manually trigger the channel */
if (CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_SET,NULL) != CSL_SOK)
{
printf("Error: EDMA channel set command is failed\n");
return -1;
}
regionIntr.region = regionNum;
regionIntr.intr = 0;
regionIntr.intrh = 0;
do {
/* Poll on interrupt bit 0 */
CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INTRPEND,®ionIntr);
} while (!(regionIntr.intr & 0x1));
/* Clear interrupt bit 0 */
if (CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTRPEND_CLEAR, ®ionIntr) != CSL_SOK)
{
printf("Error: EDMA clear interrupt bit 0 command is failed\n");
return -1;
}
/* Mapping channel 0 to event queue 1 */
if (CSL_edma3HwChannelSetupQue(hChannel,CSL_EDMA3_QUE_1) != CSL_SOK)
{
printf("Error: EDMA channel setup queue is failed\n");
return -1;
}
/* Manually trigger the channel */
if (CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_SET,NULL) != CSL_SOK)
{
printf("Error: EDMA channel set command is failed\n");
return -1;
}
regionIntr.region = regionNum;
regionIntr.intr = 0;
regionIntr.intrh = 0;
/* Poll on interrupt pend bit 1 */
do {
CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INTRPEND,®ionIntr);
} while (!(regionIntr.intr & 0x2));
/* Clear interrupt bit 1 */
if (CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTRPEND_CLEAR, ®ionIntr) != CSL_SOK)
{
printf("Error: EDMA clear interrupt bit 1 command is failed\n");
return -1;
}
/* Verify the data has been transferred correctly. */
if(Verify_Transfer(512, 1, 1, 0, 0, 0, 0, srcBuff1, dstBuff1,TRUE) == FALSE)
{
printf ("Error: Verification (Source1/Destination1) Failed\n");
return -1;
}
if(Verify_Transfer(512, 1, 1, 0, 0, 0, 0, srcBuff2, dstBuff2,TRUE) == FALSE)
{
printf ("Error: Verification (Source2/Destination2) Failed\n");
return -1;
}
/* Close channel */
if (CSL_edma3ChannelClose(hChannel) != CSL_SOK)
{
printf("Error: EDMA channel close failed\n");
return -1;
}
/* Close EDMA module */
if (CSL_edma3Close(hModule) != CSL_SOK)
{
printf("Error: EDMA module close failed\n");
return -1;
}
/* Test Passed. */
return 0;
}
/**
* @b Description
* @n
* Entry point for the test code.
*
* @retval
* Not Applicable.
*/
void dma_test_main (void)
{
Uint8 channelNum;
Int32 regionNum;
Uint8 instNum = 2;
printf ("**************************************************\n");
printf ("******************* EDMA Testing *****************\n");
printf ("**************************************************\n");
/* EDMA Instance 0: Supports only 16 DMA Channels. */
for (channelNum = 0; channelNum < 16; channelNum++)
{
if (edma_ping_pong_xfer_gbl_region(instNum, channelNum) < 0)
{
printf ("Error: Testing EDMA(%d) Ping-Pong Test (Global) Region for Channel %d FAILED\n", instNum, channelNum);
return;
}
printf ("Debug: Testing EDMA(%d) Ping-Pong Test (Global) Region for Channel %d Passed\n", instNum, channelNum);
}
/* EDMA Shadow Testing: This is run for all the SHADOW Regions from 0-7
* and on all supported DMA Channels. */
for (regionNum = CSL_EDMA3_REGION_0; regionNum <= CSL_EDMA3_REGION_7; regionNum++)
{
for (channelNum = 0; channelNum < 16; channelNum++)
{
if (edma_ping_pong_xfer_region(instNum, channelNum, regionNum) < 0)
{
printf ("Error: Testing EDMA(%d) Ping-Pong Test Shadow-Region %d for Channel %d FAILED\n",
instNum, regionNum, channelNum);
return;
}
printf ("Debug: Testing EDMA(%d) Ping-Pong Test Shadow-Region %d for Channel %d Passed\n",
instNum, regionNum, channelNum);
}
}
/* QDMA Testing: This is run for all SHADOW Regions from 0-7 and on
* all supported QDMA Channels; there are 8 supported. Remember QDMA Channels start after the
* DMA Channels which are 16 for Instance 0. */
for (regionNum = CSL_EDMA3_REGION_GLOBAL; regionNum <= CSL_EDMA3_REGION_7; regionNum++)
{
for (channelNum = 16; channelNum < 24; channelNum++)
{
if (qdma_link_xfer_region(instNum, channelNum, regionNum) < 0)
{
printf ("Error: Testing EDMA(%d) Ping-Pong Test (Shadow) Region %d for QDMA Channel %d FAILED\n",
instNum, regionNum, channelNum);
return;
}
printf ("Debug: Testing EDMA(%d) Ping-Pong Test (Shadow) Region %d for QDMA Channel %d Passed\n",
instNum, regionNum, channelNum);
}
}
/* Run the test for EDMA Instance 1 and 2; both have the same limits. */
for (instNum = 1; instNum < 3; instNum++)
{
/* EDMA Instance 1 and 2: Supports 64 DMA Channels. */
for (channelNum = 0; channelNum < 64; channelNum++)
{
if (edma_ping_pong_xfer_gbl_region(instNum, channelNum) < 0)
{
printf ("Error: Testing EDMA(%d) Ping-Pong Test (Global) Region for Channel %d FAILED\n",
instNum, channelNum);
return;
}
printf ("Debug: Testing EDMA(%d) Ping-Pong Test (Global) Region for Channel %d Passed\n",
instNum, channelNum);
}
/* EDMA Shadow Testing: This is run for all the SHADOW Regions from 0-7
* and on all supported DMA Channels. */
for (regionNum = CSL_EDMA3_REGION_0; regionNum <= CSL_EDMA3_REGION_7; regionNum++)
{
for (channelNum = 0; channelNum < 64; channelNum++)
{
if (edma_ping_pong_xfer_region(instNum, channelNum, regionNum) < 0)
{
printf ("Error: Testing EDMA(%d) Ping-Pong Test Shadow-Region %d for Channel %d FAILED\n",
instNum, regionNum, channelNum);
return;
}
printf ("Debug: Testing EDMA(%d) Ping-Pong Test Shadow-Region %d for Channel %d Passed\n",
instNum, regionNum, channelNum);
}
}
/* QDMA Testing: This is run for all SHADOW Regions from 0-7 and on
* all supported QDMA Channels; there are 8 supported. Remember QDMA Channels start after the
* DMA Channels which are 64 for Instance 1 and 2 */
for (regionNum = CSL_EDMA3_REGION_GLOBAL; regionNum <= CSL_EDMA3_REGION_7; regionNum++)
{
for (channelNum = 64; channelNum < 72; channelNum++)
{
if (qdma_link_xfer_region(instNum, channelNum, regionNum) < 0)
{
printf ("Error: Testing EDMA(%d) Ping-Pong Test (Shadow) Region %d for QDMA Channel %d FAILED\n",
instNum, regionNum, channelNum);
return;
}
printf ("Debug: Testing EDMA(%d) Ping-Pong Test (Shadow) Region %d for QDMA Channel %d Passed\n",
instNum, regionNum, channelNum);
}
}
}
printf ("**************************************************\n");
printf ("************* EDMA Testing Successful ************\n");
printf ("**************************************************\n");
return;
}
Steve,
The QDMA channels start after DMA channels (please refer to register map Table 4-1 in EDMA user guide).
In C6657, we have only one EDMA instance which includes 64 DMA channels plus 8 QDMA channels.
So in the code you attached, you changed "instance = 2" but you should also change the QDMA channel number to starts from 64 instead of starting from 16, which is true only for EDMA instance with 16 DMA channels:
......
for (channelNum = 16 64; channelNum < 24 72; channelNum++)
{
if (qdma_link_xfer_region(instNum, channelNum, regionNum) < 0)
......
And you can comment out the later part of testing, which is valid only for C6678, which has multiple EDMA instances.
starting from below
/* Run the test for EDMA Instance 1 and 2; both have the same limits. */
for (instNum = 1; instNum < 3; instNum++)
......
Then the QDMA transfer should be able to complete. Hope it helps.