Interrupt the other core after EDMA transfer

Hi Sudarshan,

As the EDMA is external to the cores so you can connect the EDMA GINT to any of the cores, for example EDMA3 GINT is event 6 in CIC0 you should connect it to the primary interrupts and than connect the primary interrupt event to one of the core interrupts,

Please note that CIC0 events can be routing to cores 0-3 and CIC1 events can be routing to cores 4-7,

Thanks,

HR

Hi HRi,
Thanks for the response. I have gone trough the EDMA3 LLD. I guess I need to do some changes in systems interrupts to host interrupts mapping.

unsigned int ccXferCompInt[NUM_EDMA3_INSTANCES][EDMA3_MAX_REGIONS] = {
{
38u, 39u, 40u, 41u,
42u, 43u, 44u, 45u,
},
{
8u, 9u, 10u, 11u,
12u, 13u, 14u, 15u,
},
{
24u, 25u, 26u, 27u,
28u, 29u, 30u, 31u,
},
};
________________________________________________________________________________________________

unsigned int ccXferHostInt[3][4] = {
{8u, 24u, 40u, 56u},
{9u, 25u, 41u, 57u},
{10u, 26u, 42u, 58u},
};

Well, I could get to know how the mapping is done. For the instance 0 and Core0, the event 38 in CIC0 which is EDMA3CC0 individual completion interrupt is mapped to the system interrupt 8 which i think is event for Core0 interrupt. I tried changing the system interrupt 8 to 24 which is event for Core1, but have got run time error saying: " ti.sysbios.gates.GateMutex: line 97: assertion failure: A_badContext: bad calling context. See GateMutex API doc for details.
xdc.runtime.Error.raise: terminating execution"

Can you tell me what exactly is that second array describes? Is it the event numbers for core interrupts or some thing else?
Also please let me know what changes should be made for DMA completion in Core0 to interrupt the Core2.

Regards
Sud