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multicore boot

Other Parts Discussed in Thread: TMS320C6678, TCI6638K2K

Hi,

 In addition to the MAD ulities, there is no other method can be used for the TMS320C6678 multicore boot?

Thanks

  • You can do it by loading individual .out files into each core. Here are the steps.

    1. Let us assume that you have n code in n cores

    2. For each code setup the memory sections using the global address (for L1 and L2)

    3. Now create n boot tables.

    4. You can load these boot table from the host or memory. Once the boot table is loaded in core0 and the boot process triggers the application in core0 to execute.

    5. The code that you run in core0, should populate the boot magic address.

    6. Also the core0 application should check that all the core are loaded correctly.

    7. Atlast the core0 application can use the IPC interrupt to wake up the secondary cores.

    Hope this helps.

    Thanks,

    Arun.

  • Hi ArunMani,

     Thanks very mach.The method you mentioned seems complicated than using MAD Util , am i right? I think i'd like better  using MAM Utilities for muliticore boot.

    In addition, can  get C6678 RBL's source code?

    Thanks.

  • Hi Arun,

    I am also analyzing booting multiple images on multicores of TCI6638k2k through PCIe, Now going through the above steps in this post,

    I have some queries:

    1. Let us assume that you have n code in n cores:
    --> I have 8 applications and 8 cores.

    2. For each code setup the memory sections using the global address (for L1 and L2)
    --> Can you please elaborate here.

    3. Now create n boot tables.
    --> Created 8 boot table, each specific to the application specific to Core
    So I will have 8 Boot Tables,say Boot_Table0 for Core0.Boot_Table1 for Core 1 and likewise.

    4. You can load these boot table from the host or memory. Once the boot table is loaded in core0 and the boot process triggers the application in core0 to execute.
    --> you have written that "boot table is loaded in core0 and the boot process triggers the application in core0 to execute.",
    So you mean to say that "Boot_Table0" should be loaded to core0 either by HOST in case of PCIe or by Memory in case of others.
    After loading, HOST should write the ENTRY POINT address on the Core0_Magic_Address. Host should then send MSI to Core0.
    After this Core0 will start executing.



    5. The code that you run in core0, should populate the boot magic address.
    --> Please elaborate here.Do the code running on Core0, is responsible for populating the Boot Magic Address of all other cores(1-7).

    6. Also the core0 application should check that all the core are loaded correctly.
    --> In case of PCIe boot, should not this be responsibility of Host to load the images(Boot_Table1 on Core1, Boot_Table2 on Core2 and likewise).
    7. Atlast the core0 application can use the IPC interrupt to wake up the secondary cores.


    Thanks in advance,
    Chandan