• State Resolved
  • Locked Locked
  • Replies 6 replies
  • Subscribers 100 subscribers
  • Views 1850 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

uPP loopback

Ganz
Intellectual 770 points


When uPP is in loopback mode using internal clk, will external signals affect the loopback operation? In other words, if an external device is driving the start, enable, wait or data signals, will it cause the loopback fail?

  • 0
    TI__Mastermind 20790 points

    Ganz,

    Digital loopback(DLB): (UPCTL.MODE = 2h or 3h for DLB)
    In this case, the uPP peripheral internally routes data and control signals from one channel to the other.
    When the peripheral is configured in duplex mode, DLB can be used.
    The standard uPP pin multiplexing must be applied.

    For Transmit Mode:
    START is an output signal and is always driven.
    ENABLE is an output signal and is always driven.
    WAIT is an input signal and may be disabled using the WAITx bit in UPICR.
    CLOCK is an output signal.
     
    For Receive Mode:
    START is an input signal and may be disabled using the STARTx bit in UPICR.
    ENABLE is an input signal and may be disabled using the ENAx bit in UPICR.
    WAIT is an output signal.
    CLOCK is an input signal.

    Digital loopback(DLB) is primarily useful for debug purposes, and requires no physical connections between channels.

  • 0 in reply to Pubesh
    Intellectual 770 points

    Pubesh,

    Thanks for the response.

    What I want to know is in DLB mode, whether the internal signals are isolated from the external devices. In the above chart where channel B is loopback to channel A, if an external device is also driving the data pins signals to channel, would it cause the loopback  to fail?

    Regards,

    GanZ

  • 0 in reply to Ganz
    Intellectual 820 points

    Hi

    Did you ever figure out the answer to this question? I'd like to know too.

    Additionally, in loopback mode the diagram shows the data pins being linked but I assume the control signals are linked too. By experimenting, I've worked out that the two START signals must be linked and the two ENABLE signals are linked. However, it's behaving as if the CLOCK signals aren't linked. The CLOCK on the rx channel seems to be going at 75MHz (like it would if it were a tx channel with the clock divider set to div by 1) rather than whatever speed I program on the tx channel.

    Has anyone else noticed this? Am I doing something wrong? I've been through all the device registers carefully and I can't see anything that selects the source of the RX clock. Do I need to make a physical connection between the CLOCK pins?

    Thanks

    Roy

  • 0 in reply to Roy Jackson
    Intellectual 770 points

    Roy,

    I guess it was my English problem. The document did say "Digital loopback(DLB) is primarily useful for debug purposes, and requires no physical connections between channels". I misunderstood what it means. I thought it means you don't need to have physical connections. If you have , it does not metter. Actually that's not the case. At DLB mode, the internal signals are not isolated from the outside world. Physical connected signals need to be put in tristate for DLB to work. 

    The CLOCK seems to work fine for me.

    GanZ

  • 0 in reply to Ganz
    Intellectual 820 points

    Thanks GanZ,

    That's good to know. So I ought to be able to get it working too, provided there are no external signals.

    Thanks again

    Roy

  • 0 in reply to Roy Jackson
    Prodigy 160 points

    Hi All,

    I am working on the SBC8018 board for upp driver. I am able to build and install the upp driver code given on the below link,

    I am trying to run loop back using linux upp driver code.

     I have allocated statically tx/rx buffer. While reading rx buffer I am always getting value as 0.

    Could you please let me know, is static buffer allocation affect this DMA operation.

    Here is my upp configuration,


     UPPID = 44231100
     UPPCR =       8a
     UPDLB =     1000
    RSVD0 =        0
    UPCTL =        7
     UPICR =        0
     UPIVR =        0
     UPTCR =        0
     UPISR =     1010
     UPIER =        0
     UPIES =        0
     UPIEC =        0
     UPEOI =        0
                =        0
                =        0
                =        0
     UPID0 = c6df0068
     UPID1 =    10040
     UPID2 =        0
                =        0
     UPIS0 = c6df0068
     UPIS1 =    20000
     UPIS2 =       80
                =        0

    UPQD0 = c6df2210

    UPQD1 =    10040
     UPQD2 =        0
                  =        0
     UPQS0 = c6df2210
     UPQS1 =    20000
     UPQS2 =       80
                 =        0
    With this configuration I am always getting rx buffer value as zero.

    Please let me know any modification do I need to make on kernel side to make it work.

    Thanks

    Mrudula