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C6678 SRIO Doorbell interrupt not triggering

Gabriele_Giannini
Intellectual 925 points

i have 2 DSP connected via SRIO

The first one send data to shared memory of the second and a doorbell

The doorbell should trigger an interrupt activating a DMA transfer and moving the data in the L2 of the Core 0.

I've created a setup for the CHIP INTERRUPT CONTROLLER

//3. global Enable
pSiCIC_REGS[2].glb_en = 1;
// 3a Route Doorbell Interrupt to Intdst0
pSiSRIO_DOORBELL_ICRR[0].reg_1 &= ~0xF;
// 3b Enable System Interrupt 93 (INTDST1)
pSiCIC_REGS[2].sys_enable_ind_set = 93; //System Interrupt Enable Indexed Set Register allows enabling an interrupt.
// 3c Map System Interrupt 93 to Channel 0
pSiCIC_REGS[2].ch_map[93/4] &= ~(0xFF<<(8*(93 & 3)));
// 3d Map Channel 0 to Host Interrupt 0
/*Channel to Host Mapping is Fixed*/
// 3e Enable Host Interrupt 0
pSiCIC_REGS[2].host_enable_ind_set = 0;

I'm trying during the debug to see if it's all workyng correctly but the doorbell interrupt is capture by the Doorbell Interrupt condition Status register, but not in the  System Interrupt Status Raw/Set Registers

am i missing something?

  • 0
    TI__Mastermind 28085 points

    Hi Gabriele,

    Please share your test code. I will try to reproduce your issue and try to resolve.

    Take a look at below e2e thread and wiki link.

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/312741.aspx

     http://processors.wiki.ti.com/index.php/Configuring_Interrupts_on_Keystone_Devices

    Thanks,

  • 0 in reply to Ganapathi Dhandapani95
    Intellectual 925 points

    UINT32 SRIO_EDMA_INT_TEST(UINT32* DestVect)
    {
    UINT32 Count = 262144 / 16384; //256kB in pacchetti da 16kB
    UINT32 Errors = 0;

    if (DspNum == 0)
    {
    //DSP0 transmit data from his shared memory
    FillMemoryPacket(Word32, (void*)aSHARED_MEMORY_BASE, Count, 16384);

    //Trasmit via SRIO, add DOORBELL at t he end of transmission
    SRIO_StartTransaction(DNUM, 7, STREAMING_WRITE, (void*)aSHARED_MEMORY_BASE, (void*)aSHARED_MEMORY_BASE, 262144, DSP2ID, DISABLE_INT, true, 0);
    }
    else
    {
    //DSP1 wait for doorbell and test received data


    // 1. Setup DMA from Shared to L2
    UINT32 DstAddress = (UINT32)DestVect;

    if ( DstAddress < 0x0087FFFF )
    DstAddress |= (0x10000000 | 0x1000000*DNUM);

    CDma::LongLinearDMA(1, 42, (void*)aSHARED_MEMORY_BASE, (void*)DstAddress, 262144); //42 = CIC2_OUT0

    // 2. Setup Interrupt after completion of transaction
    CDma::EnableInterrupt(1, 42, 8);

    // 3. Setup CIC for routing Interrupt to EDMA contrlller
    pSiCIC_REGS[2].glb_en = 1;
    // 3a Route Doorbell Interrupt to Intdst0
    pSiSRIO_DOORBELL_ICRR[0].reg_1 &= ~0xF;
    // 3b Enable System Interrupt 93 (INTDST0 - CIC2 input)
    pSiCIC_REGS[2].sys_enable_ind_set = 93; 
    // 3c Map System Interrupt 93 to Channel 0
    pSiCIC_REGS[2].ch_map[93/4] &= ~(0xFF<<(8*(93 & 3)));
    // 3d Map Channel 0 to Host Interrupt 0
    /*Channel to Host Mapping is Fixed*/
    // 3e Enable Host Interrupt 0
    pSiCIC_REGS[2].host_enable_ind_set = 0;

    //Enable event for starting DMA transaction
    CDma::EnableEvent(1, 42); //Event 42 of EDMACC1 = CIC2_OUT0

    // 3. Wait for completion of transaction

    while ( !(pSiEDMA_CC_REGS[1].globalch.ipr[8>>5] >> 8) ) ;

    //Test received data
    Errors = TestMemoryPacket(Word32, (void*)DestVect, Count, 16384);
    }

    return Errors;
    }

  • 0 in reply to Gabriele_Giannini
    Intellectual 925 points

    Ok, i've resolved.

    In one of the linked discussion is written that Interrupt won't be triggered until a write in the corresponding Interrupt Pacing.

    So i've writen a 0 in INTDST0_Rate_CNTL and now it's working correctly

  • 0 in reply to Gabriele_Giannini
    Prodigy 50 points

    Hello, I use C6678 and Xilinx K7 through SRIO communication. FPGA sent to C6678 doorbell, when sending 2023 times, C6678 cannot continue to trigger the interrupt. The interrupt I is mapped to the INTDST16, and and made clear the interrupt in interrupt operation. Excuse me, what is the reason?