DM814x VPSS connect ov10630 with VIN[0] portB on SD channel to display

Hi Brijesh,

In fact, I am using embedded sync input. I can watch CCIR656 signal with Logic Analyzer from camera output.

I also have set pVipCreateArgs->videoCaptureMode = VPS_CAPT_VIDEO_CAPTURE_MODE_SINGLE_CH_NON_MUX_EMBEDDED_SYNC but its not work.

The program run normally but display is nothing.

Do you have any idea for this issue?

This example code is for tvp5158(VIN0 portA) and I just change capture port to VIN0 portB with CCIR656 source.

So, I am really confused.

By the way, discrete sync must refer H-sync and V-sync. Embedded sync doesn't refer them, right?

Look forward your reply. Thanks,

Kuve

Hi,

In addition to setting capture capture more, you will require to  set the capture interface as well. Can you see if this is set to 8bit.

Thanks,

Brijesh Jadav

Hi Brijesh,

I know that set 8bit for partition VIN[0] into portA and portB.

I am not sure where to set 8bit and how to check this parameter.

In \vps\chains\links\capture\captureLink_drv.c, I set pVipCreateArgs->videoIfMode = VPS_CAPT_VIDEO_IF_MODE_8BIT.

Does it set capture interface as 8bit?

Thanks,

Kuve

Hi,

This should set the capture interface to 8bit correctly. can you first try bringing up 8 bit capture using capture sample application? this integration may require changes to support single channel 8 bit capture.

Thanks,

brijesh Jadav

Hi Brijesh,

I watch DSP register 0x551C (VIN0_PARSER FIQ Status) and It is 0x00003080.

Bit[7] = 1: Output FIFO Port B Luma Overflow Status

Bit[12] and [13] are 1, maybe Port B Link had been connected and then disconnected, because FIFO overflow?

Could you tell me what happen and how to fix it?

Thanks,

Kuve

Hi,

Can you try resetting the VIP port? There is an ioctl (RESET_AND_RESTART) to reset it.

Thanks,

Brijesh Jadav

Hi Brijesh,

In HDVPSS_01_00_01_28\packages\ti\psp\examples\common\vps\chains\links\capture\captureLink_drv.c,

CaptureLink_drvProcessData()

{

           ............................

    if(pObj->enableCheckOverflowDetect)
    {
            CaptureLink_drvOverflowDetectAndReset(pObj, TRUE);
    }

}

I use this way to reset VIP port, but register 0x551C still is 0x00003080.

What situation will the Bit[12] (prtbconnstatus) be configed 1 and Bit[13] (prtbdisconnstatus) be configed 1?

Thank you for your reply patiently.

Kuve

Hi,

It seems like it is going in continuous overflow, can you please send my your VIP create parameters?

thanks,

brijesh jadav

Dear Brijesh,

Thank you for your help kindly. I already send you my VIP setting files.

Actually, we have another example code to display OV10630 image successfully on TI’s EVM board.

1.      capture.c

       I just refer captureInit() in this file to configure VIP because its work from VIN1 portA to display image on HDMI channel.

       createDriver() to set vipParserPortConfig and videoCaptureMode.

Now, I can use VPSS example code with TVP5158 and output image to SD channel on our board.

The example is in HDVPSS_01_00_01_28\packages\ti\psp\examples\common\vps\chains.

On our board, we connect TVP5158 to VIN0 portA[7:0] and connect OV10630 to VIN0 portB[15:8].

We use the same setting of OV10630 and ape another example code to configure VIP.

2.     chains_tvp5158NonMuxCapture.c (HDVPSS_01_00_01_28\packages\ti\psp\examples\common\vps\chains\src)

       Chains_tvp5158NonMuxCapture() to set VIP format.

3.      captureLink_drv.c (HDVPSS_01_00_01_28\packages\ti\psp\examples\common\vps\chains\links\capture)

CaptureLink_drvCreateInst() Line 362 to set videoCaptureMode.

4.  vpsdrv_captureVip.c (HDVPSS_01_00_01_28\packages\ti\psp\vps\drivers\capture\src)

   Vps_captVipParserConfigSetup() to set vipPortConfig.

Address Offset: 0x5500(VIN0_PARSER Main) = 0x00000002

Address Offset: 0x550C(VIN0_PARSER Port B 0) = 0x00402104

Address Offset: 0x551C(VIN0_PARSER FIQ Status) = 0x00003080

I wonder if I need to modify other file? Or I modify wrong files?

Look forward your reply. Thanks,

Kuve

By the way, I mark #define SYSTEM_USE_VIDEO_DECODER in System.h (HDVPSS_01_00_01_28\packages\ti\psp\examples\common\vps\chains\links)

If I don't mark this define, the program will hang on and error code as below.

[Cortex_M3_RTOS] ti814x/src/vps_platformTI814x.c @ Line 458: Invalid decoder ID
[Cortex_M3_RTOS]  4839: Assertion @ Line: 145 in capture/captureLink_drv.c: status==FVID2_SOK : failed !!!

Hi Brijesh,

I change camera to connect VIN[1] poerA and its work to display image. (using the same VIP setting except vipInstId)

I want to know why I can't use VIN[0] portB.

We have checked H/W Pin MUX setting.

Do you have any idea for this issue?

Thanks,

Kuve

Hi Brijesh,

Do you have any update for this issue of VIN[0] portB?

I doubt whether VPSS couldn't support standard BT656.

Because I have tried to modify VIP setting to access OV10630 with standard BT656(embedded sync), its not work including both VIN[0] portB and VIN[1] portA.

Can you confirm this point? If it doesn't support, we have to replan new architecture as soon as possible.

Thanks,

Kuve

Hi,

We solve this issue of VIN[0] portB.

But we still can't display image with embedded sync, its work for discrete sync.

If I want to get BT656 data format, how do I set the VIP?

In addition to captureLink_drv.c to modify videoCaptureMode(VPS_CAPT_VIDEO_CAPTURE_MODE_SINGLE_CH_NON_MUX_EMBEDDED_SYNC), what should I configure?

I use this example in HDVPSS_01_00_01_28\packages\ti\psp\examples\common\vps\chains.

Thanks,

Kuve