This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Changing memory definitions for DSP OMX component (vlpb)

Hi Archith,

 

I am trying to make my OMX example capture-dsp-display based on 2 TI OMX examples capture-encode and c6xtest.
The capture is done to a video in HD 1080p format (frame buffer is of size 1920x1080x3).
Changing the OMX DSP component input and output buffers causes problems of insufficient memory as follows:

VLPB: Error in OMX_AllocateBuffer() : OMX_ErrorInsufficientResources 

after looking at the EZSDK memory map in http://processors.wiki.ti.com/index.php/EZSDK_Memory_Map
I see that there is a shared memory region for Host and MC-HDVPSS of 188MB which called  IPC_SR_FRAME_BUFFERS which uses to allocate all video buffers

I have a few questions regarding this issue.

Q1. What is TI recommended suggestion to overcome this problem?

Q2. Can i instruct the OMX DSP component to allocate buffers in another region?

Q3. Is it possible to add the DSP to the shared region IPC_SR_FRAME_BUFFERS (together with host and MC-HDVPSS)? As anyway i intend to process the captured frame on the DSP and this way i can avoid moving data from one memory area to the other.

Q4. If the answer to Q3 is positive, what should i do in order to use this region for DSP OMX buffer allocation?

 

Thanks,

Gabi 

  • Gabi Gvili said:
    Q1. What is TI recommended suggestion to overcome this problem?

    As your buffer requirement is high compared to what SharedRegion (SR) #0 's total size, I would recommend instructing the DSP to allocate frame buffers from SR#2 which is much larger.

     

    Gabi Gvili said:
    Q2. Can i instruct the OMX DSP component to allocate buffers in another region?

    Yes. 

    Gabi Gvili said:
    Q3. Is it possible to add the DSP to the shared region IPC_SR_FRAME_BUFFERS (together with host and MC-HDVPSS)? As anyway i intend to process the captured frame on the DSP and this way i can avoid moving data from one memory area to the other.

    Yes.

    Gabi Gvili said:
    Q4. If the answer to Q3 is positive, what should i do in order to use this region for DSP OMX buffer allocation?

    There are several changes required. In the file <OMX_ROOT>/packages/ti/omx/demos/dm81xx/src/app_cfg.h

    The following macros have to be set with these values:

     

     

    /* OMX Base DioFQ */

     

    #define MEMCFG_NUMFQSHAREDREGIONS                 (3) 

     

    #define OMXBASE_DIOFQCFG_NUMFQSHAREDREGIONS       (MEMCFG_NUMFQSHAREDREGIONS) <Tells the DSP that it will be using 3 SRs instead of just 1 as earlier>

     

    #define OMXBASE_DIOFQCFG_MODSTAT_CURSRREGIONBUF           (2)  <Tells the DSP which shared region to allocate Buffers from>

    #define OMXBASE_DIOFQCFG_MODSTAT_CURSRREGIONCTRLCACHEON   (0)

    #define OMXBASE_DIOFQCFG_MODSTAT_CURSRREGIONCTRLCACHEOFF  (1)

     

     

    Also, the firmware loader file (<EZSDK_ROOT>/board-support/media-controller-utils_<XX.YY>/src/firmware_loader/memsegdef_default.c) needs to be modified to the effect that DSP participates in SR0, SR1 and SR2. (Participation in SR1 becomes necessary due to a bug, but is harmless for now). I have attached a sample file where this is enabled. But please take care to correct the start addresses of the Internal heap and shared Regions defined in this file according to the EZSDK Memory Map as in the wiki page.

    5025.memsegdef_default.zip

     

    Rebuild firmware_loader and place the rebuilt binary in <EZSDK_FS>/usr/bin and reboot your board. After these changes, VLPB will allocate memory from SR#2 which is big enough to support your usecase.

     

    Archith

  • Hi Archith,

    Thank you very much for your help.

    We have done what you instructed us to do, as far as we understand there is a new firmware loader which i see that is different than the previous one and there is a new DSP executable file which i see that is different than the previous one, but our problem still remains the same.
    As far as we understand we need to change only 2 files the first is  <OMX_ROOT>/packages/ti/omx/demos/dm81xx/src/app_cfg.h

    and the second is <EZSDK_ROOT>/board-support/media-controller-utils_<XX.YY>/src/firmware_loader/memsegdef_default.c 

    We recompiled all by running the makefile from ezsdk root.
    Please see the attached file  8688.dvp_memsegdef_default.zip
    Please advice what are we doing wrong?

    Thanks,
    Gabi

  • The mem_segdefault file looks fine.

    So, you still see the OMX_AllocateBuffer error, then? Or do you see any other symptoms?

    If you have a JTAG emulator (say XDS 100), can you try to connect to the DSP in CCS, load symbols from the new DSP binary that you see the value of the variable of the variable DioFQCFG_module->fqBufInfoCtx.curSrRegionBuf is 2 and MEMCFG_sharedRegionConfigTable.aSRInfo[2].uIndex is also 2.

    Archith

     

     

  • Yes we still see the OMX_AllocateBuffer error.
    We have a JTAG emulator blackhawk 560BP and we have just downloaded the CCS v5.1.
    We need some time to configure the CCS to the TI816x.  

    Gabi 

     

  • Hi Archith,

    We are currently looking with the CCS on the DSP, the variable DioFQCFG_module->fqBufInfoCtx.curSrRegionBuf is 0
    and the variable MEMCFG_sharedRegionConfigTable.aSRInfo[2].uIndex is 2. 
    What are we doing wrong?

     

    Thanks,
    Gabi 

     

  • Can you show a screen shot of the field values in DioFQCFG_module? And can you confirm that you have modified :

     

    #define OMXBASE_DIOFQCFG_MODSTAT_CURSRREGIONBUF           (2)  <Tells the DSP which shared region to allocate Buffers from>

    in <OMX_ROOT>/packages/ti/omx/demos/dm81xx/src/app_cfg.h, rebuilt the omx dsp binary and are loading that on the dsp ?

    Archith

  • Hi Archith,

    We have verified that

     

    #define OMXBASE_DIOFQCFG_MODSTAT_CURSRREGIONBUF           (2) 

    in <OMX_ROOT>/packages/ti/omx/demos/dm81xx/src/app_cfg.h

    After this in EZSDK root directory we ran <make clean> verified that all executables were deleted and then ran <make all> and moved the new executables craeted to the NFS .

    After this we open the CCS with the c6xtest (vplb) example.

    The variable DioFQCFG_module->fqBufInfoCtx.curSrRegionBuf remained 0 as can be seen in print screen below.

    Maybe this variable DioFQCFG_module->fqBufInfoCtx.curSrRegionBuf receives a hard wired value somewhere in the code.

     

  • To debug this, we need to see what is the value at load time. For this, modify the main function like this:

     

    main () 

    {

      volatile int i =1;

      while (i);

      .

      .

    }

    In boot up time, when DSP core gets loaded, the DSP will be brought out of reset , xdc runtime init scripts will run and main will be entered. So at this stage, you can connect to the DSP and see that the DSP is looping inside the above while (). In the expressions window, set the value of i to 0 and break out of the loop and see the value of 

    DioFQCFG_module->fqBufInfoCtx.curSrRegionBuf  (take care that you have put a BKpoint after the while statement). If its 2, then your hypothesis looks probable.. To catch where this is getting changed, you can put a HW watch point (configured to catch writes) at the addess of this variable and the emulator will halt at the moment of write. If we know where it gets changed, we can track down what config got missed.

     

    Archith

  • Another question i have been looking for the variable DioFQCFG_module in the entire envoirnment however i can't find it in any source file.
    Can you please tell me what kind of variable is this and where is it set? 

    Thanks,

    Gabi

  • Hi Archith,

     

    We put in main

      volatile int i =1;

      while (i);

    and we see that DioFQCFG_module->fqBufInfoCtx.curSrRegionBuf is 0.
    Where can we see this variable set in source code?
    If i change it in the main by myself should it work?
    Thanks,
    Gabi

  • Hi Archith,

     

    We changed the variable DioFQCFG_module->fqBufInfoCtx.curSrRegionBuf  to 2 manualy in the CCS and ran the VLPB with allocation of big buffers and allocation was successful, this gives us the idea to set DioFQCFG_module->fqBufInfoCtx.curSrRegionBuf  to 2 in the main function.
    We see in the CCS that the type of  DioFQCFG_module is DioFQCFG_Module_State_s *.
    We added the following two lines to   main_c674.c

    extern struct DioFQCFG_Module_State_s;
    extern struct DioFQCFG_Module_State_s *DioFQCFG_module;

    and the following line in the main() function (in line 178)

    DioFQCFG_module->fqBufInfoCtx.curSrRegionBuf = 2;

    After compilation we receive the following error 

    line 178: error: pointer to incomplete class type is not allowed


    Can you help us with that?

    Thanks,
    Gabi

     

  • Hi Archith,

    Can you please answer? This issue is very important for us.

    Thanks,
    Gabi 

  • I think the problem is that the file where we set the variable value OMXBASE_DIOFQCFG_MODSTAT_CURSRREGIONBUF in the struct  DioFQCFG is present in an object file omxbase_cfg.oe674 which is not and cannot be built in the EZSDK as available on the web. I guess thats why changing the macro value didnt work for you.

    I am attaching a copy of the library from my machine which has the changes require. Can you please put it in the lcoation <OMX_ROOT>/packages/ti/omx/comp/omxbase/lib/c6xdsp/debug and look at whether the mem allocation works?

     

    I apologize for the delay with me getting back to you on this.

     

    4214.omxbase_cfg.zip

     

    Archith

  • Hi Archith,

     

    Thank you very much for your help, it is working OK now.

     

    Gabi

  • Hi Gabi,

    I am having the similar application (decode->dsp->display). Referring to your application, Are you copying the capture buffer to vlpb buffer manually, since both compoenents (capture and vlpb) allocates buffers using OMX_AlloateBuffer ?

    Regards,

    Raghava

     

  • I was using capture->dei->vlpb->display and it worked.

  • Thanks for the response.  Can you please clarify the following questions:

    1. Did you resolve the latency issues with using VLPB in your capture->dei->vlpb>display path ?

    2. Are you directly operating on SR2 in DSP or you do some DMA into DSP internal memory before processing ?

    3. If you operating on SR memory in DSP,  Do you enable cache for SR2 in DSP ?

    4. Have you been able to do processing of SR2 on A8 also ?

  • Raghava said:
    1. Did you resolve the latency issues with using VLPB in your capture->dei->vlpb>display path ?

    No, i am living with that latency even though i believe that it could have been better if TI have looked at this issue more carefully.

    Raghava said:
    2. Are you directly operating on SR2 in DSP or you do some DMA into DSP internal memory before processing ?

    I am doing DMA into DSP internal memory before processing.

    Raghava said:
    3. If you operating on SR memory in DSP,  Do you enable cache for SR2 in DSP ?

    Didn't make SR2 cachable for the DSP, i have checked it but performances were not good enough.

    Raghava said:
    4. Have you been able to do processing of SR2 on A8 also ?

    This is the most annoying issue, i have succeeded doing that together with DSP processing on EZSDK 5.03, but can't do that on EZSDK5.05, this is TI bug for sure but i couldn't get any support from TI regarding this issue.

  • Thank you very much for the quick response.

    1.  What is the latency your seeing for HD frame buffer process ?

    2.  Are you using EDMA to transfer form SR2 to DSP memory.  Can you please give little more details on this (EDMA API's,  which part of DSP memory) ?

    4.  How did you manage to get processing of SR2 buffer on A8 in EZSDK 5.03, Can you please elaborate a little more on this since i am using EZSDK 5.03 ?

    Thank You,

    Raghava

  • Raghava said:
    1.  What is the latency your seeing for HD frame buffer process ?

    i see ~250msec glass to glass latency with 720p

    Raghava said:
    2.  Are you using EDMA to transfer form SR2 to DSP memory.  Can you please give little more details on this (EDMA API's,  which part of DSP memory) ?

    Yes i did, i have used edma_lld library to write my edma handler and transferred data into L2 memory.

    Raghava said:
    4.  How did you manage to get processing of SR2 buffer on A8 in EZSDK 5.03, Can you please elaborate a little more on this since i am using EZSDK 5.03 ?

    I have written a linux kernel edma driver based on the example in 

    /ezsdk/example-applications/linux-driver-examples-psp04.04.00.01/edma