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How to use codec engine or C6Run component together with omx component in ezsdk5.03?

hello,everyone

         Now i want to use omx components to do decode-display and i see it must be loaded with load-hd-firmware.sh. Another, i want to use dsp to do other works, but i see if you use codec engine or c6Run component to call dsp, you must unload the load-hd-firmware.sh.

         So, i want to know how to call dsp at the time of calling Hdvicp2 by omx component? Can the codec engine or C6Run component work together with omx?

         best regards

          zhang yan

  • I think it should be possible, since only the DSP OMX components use the DSP (Audio Codec). The HDVICP firmwares run on the M3's, whereas the DSP firmware runs on the DSP. I don't know if the other Firmwares require the DSP firmware to be loaded in the new SDK, but in the EZSDK 5.02 this was not the case and I was able to use at least VPSS and C6Run in parallel. I think as long as you don't use the DSP OMX components you should be safe.

    Would be nice if an TI employee could confirm that.

  • hi, Markus Hofstaetter

          i think you must load the S15load-hdvpss-firmware.sh and S10load-hdvicp2-firmware.sh when you use C64Run and VPSS in parallel, Otherwise, you can't use VPSS.  I will try to use codec engine or c6Run without unload hd-firmware.sh. But this operation doesn't meet with the deveopment guide. Hope the ti expert confirm it.

          thank you very much

          zhang yan

  • hi, 

         i ezsdk 5.02 i can run c64Run example or codec engine example with firmware(hdvicp and vpss) loaded. But in ezsdk 5.03,  the syslink and codec engine example can run well with firmware unloaded, they can't run with firmware loaded.

         So, i don't know whether can i use both hdvicp by the omx component and dsp by c6Run component i ezsdk 5.03. Pls ti expert give me some suggestions.

         regards

         zhang yan

  • Hi,

    I've the same problem... is there anyone who succeded to run "syslink examples"/"c6ez based app" without unloading M3-firmwares?

    Because it hangs on assertion about status, I'll try to understand what different values of status mean reading syslink docs.

    Sorry for poor English.

    Diego

  • I have the same issue as well. I need to run codec engine server on DSP with m3 firmware running.

    We will not be running OpenMAX on DSP. Instead, DSP will be running custom video processing IUNIVERSAL codec on the video buffer filled in by OpenMAX VFCC and VFPC.

    I am looking to see a DSP codec engine server example configuration settings  with new memory map updates for EZSDK 5.03, so I can run m3 (for video capture, noise filtering etc) and also run DSP codec server  for custom video processing at the same time.

    Thanks

    RV

  • Yes, one can run an executable on the M3 and pass buffers to DSP for processing over codec engine as long as the Memory map has no conflicts. The only restriction in these scenerios may be that an applcation developer cannot have OpenMax DSP component and a codec engine based server running on the DSP at the same time.  We have some example server configurations that we have been able to run successfully with V4L2/OpenMax capture running on the M3 while the frames are being processed on the DSP.

    I am attaching an example server.cfg script for your reference:

     0537.server_ref.cfg

    Note:

    • I have  left some code commented in the script  for that helped us avoid memory conflicts with M3 firmware.

    For eg

    Comment out this configuration that may be provided in the default codec server created using the wizard.

    SharedRegion.setEntryMeta(
        SharedRegion_map["Ipc"],  /* index */
        entry2
    );

    • If XDC configuro is used to link the server with the final ARM executable, do not use the following configuration in your application configuration script.

    var Proc = xdc.useModule('ti.sdo.ce.ipc.dsplink.Processor');

    //Proc.sharedRegionId = common.SharedRegion_map["Ipc"];

    //Proc.heapId = common.MessageQ_heapMap["Ipc"];

    • All M3 firmware binaries and DSP binaries used in EZSDK follow the memory map provided here :

     http://processors.wiki.ti.com/index.php/EZSDK_Memory_Map

    Let us know if you have any questions here.

    Regards,

    Rahul

  • Zhang,

    We acknowledge what you have observed EZSDK 5.02 did not have the requirement to unload firmaware because there was no memory map conflict there. However in EZSDK 5.03 there seems to be a conflict in the memory map especially the one that are used for IPC which is why you need to unload the firmware before running the codec engine or C6Run examples.

    Please follow the instruction above to modify the codec engine examples and you should be able to run resulting binaries with firmware loaded.

    Regards,

    Rahul

  • Rahul,

    I cannot see updated DSP memory map details in attached file in the post.

    I have listed the new DSP codec server memory map, to the best of my knowledge, in this http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/165801.aspx post in detail.

    Can you upload the new memory map, or check my post to see if it looks okay.

     

    Thanks

     

    RV

     

     

  • After updating codec engine cfg file, I am getting stuck at :

    [t=0x00003f72] [tid=0x400e92f0] ti.sdo.ce.osal.Global: [+E] Global_atexit> Enter (fxn=0x2de88)
    [t=0x00004036] [tid=0x400e92f0] ti.sdo.ce.osal.Global: [+E] Global_atexit> Enter (fxn=0x332f8)
    [t=0x000040eb] [tid=0x400e92f0] ti.sdo.ce.ipc.Processor: [+2] Processor_init> SysLink_setup()...
    [t=0x0000b881] [tid=0x400e92f0] ti.sdo.ce.ipc.Processor: [+2] Processor_init> ... SysLink_setup() done
    [t=0x0000ba21] [tid=0x400e92f0] ti.sdo.ce.osal.Global: [+E] Global_atexit> Enter (fxn=0x2ea4c)
    [t=0x0000bacc] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] ALG_init> Enter
    [t=0x0000bb15] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[0] = 0x0
    [t=0x0000bb55] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[1] = 0x0
    [t=0x0000bb94] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[2] = 0x0
    [t=0x0000bbd1] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[3] = 0x0
    [t=0x0000bc0e] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[4] = 0x0
    [t=0x0000bc4c] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[5] = 0x0
    [t=0x0000bc89] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[6] = 0x0
    [t=0x0000bcc6] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[7] = 0x0
    [t=0x0000bd03] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[8] = 0x0
    [t=0x0000bd3f] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[9] = 0x0
    [t=0x0000bd7d] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[10] = 0x0
    [t=0x0000bdbb] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[11] = 0x0
    [t=0x0000bdf9] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[12] = 0x0
    [t=0x0000be37] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[13] = 0x0
    [t=0x0000be76] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[14] = 0x0
    [t=0x0000beb4] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[15] = 0x0
    [t=0x0000bef2] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[16] = 0x0
    [t=0x0000bf30] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[17] = 0x0
    [t=0x0000bf6e] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[18] = 0x0
    [t=0x0000bfac] [tid=0x400e92f0] ti.sdo.ce.alg: [+E] _ALG_sems[19] = 0x0
    [t=0x0000bfeb] [tid=0x400e92f0] ti.sdo.ce.alg: [+X] ALG_init> Exit
    [t=0x0000c026] [tid=0x400e92f0] ti.sdo.ce.osal.Global: [+E] Global_atexit> Enter (fxn=0x27090)
    [t=0x0000c0af] [tid=0x400e92f0] ti.sdo.ce.Engine: [+6] Engine_init> CE debugging on (CE_DEBUG=2; allowed CE_DEBUG levels: 1=min, 2=good, 3=max)
    [t=0x0000c138] [tid=0x400e92f0] ti.sdo.ce.osal.Global: [+E] Global_atexit> Enter (fxn=0x1e800)
    [t=0x0000c1cd] [tid=0x400e92f0] ti.sdo.ce.Engine: [+X] Engine addEngineToList(0xa6f14, 1)
    [t=0x0000c21e] [tid=0x400e92f0] ti.sdo.ce.osal.Memory: [+E] Memory_alloc> Enter(0x34)
    [t=0x0000c272] [tid=0x400e92f0] ti.sdo.ce.osal.Memory: [+X] Memory_alloc> return (0xd5680)
    [t=0x0000c2c7] [tid=0x400e92f0] ti.sdo.ce.Engine: Engine addEngineToList> Adding desc: name = local, remoteName = (null)
    [t=0x0000c337] [tid=0x400e92f0] ti.sdo.ce.osal.Memory: [+E] Memory_alloc> Enter(0x30)
    [t=0x0000c38a] [tid=0x400e92f0] ti.sdo.ce.osal.Memory: [+X] Memory_alloc> return (0xd56b8)
    [t=0x0000c3f5] [tid=0x400e92f0] ti.sdo.ce.osal.Global: [+E] Global_atexit> Enter (fxn=0x2a454)
    [t=0x0000c468] [tid=0x400e92f0] ti.sdo.ce.Server: [+E] Server_init()
    [t=0x0000c4ad] [tid=0x400e92f0] ti.sdo.ce.Server: [+E] Server_init> Global_useLinkArbiter = 0
    [t=0x0000c4fb] [tid=0x400e92f0] ti.sdo.ce.osal.Global: [+E] Global_atexit> Enter (fxn=0x255bc)
    [t=0x0000c569] [tid=0x400e92f0] xdc.runtime.Main: main> ti.sdo.ce.examples.apps.universal_copy
    [t=0x0000c5c6] [tid=0x400e92f0] ti.sdo.ce.Engine: [+E] Engine_addStubFxns('UNIVERSAL_STUBS', 0xa6fd0)
    [t=0x0000c628] [tid=0x400e92f0] ti.sdo.ce.Engine: [+X] Engine_addStubFxns> return (0)
    [t=0x0000c68e] [tid=0x400e92f0] ti.sdo.ce.Engine: [+E] Engine_add(0xbeec2b84)
    [t=0x0000c6e5] [tid=0x400e92f0] ti.sdo.ce.Engine: [+X] Engine addEngineToList(0xbeec2b84, 0)
    [t=0x0000c742] [tid=0x400e92f0] ti.sdo.ce.Engine: Engine addEngineToList> Adding desc: name = remote_copy_DSP, remoteName = all_DSP.xe674
    [t=0x0000c7b2] [tid=0x400e92f0] ti.sdo.ce.Engine: [+X] Engine_add> return (0)
    [t=0x0000d39c] [tid=0x400e92f0] xdc.runtime.Main: [+1] App-> Application started, procId DSP engineName remote_copy_DSP input-file ./in.dat output-file ./out.dat.
    [t=0x0000d52d] [tid=0x400e92f0] ti.sdo.ce.osal.Memory: [+4] Memory_contigAlloc> CMEM_alloc(0x400) = 0x4cebc000.
    [t=0x0000d5c8] [tid=0x400e92f0] ti.sdo.ce.osal.Memory: [+4] Memory_contigAlloc> CMEM_getPhys(0x4cebc000) = 0x97fff000.
    [t=0x0000d65c] [tid=0x400e92f0] ti.sdo.ce.osal.Memory: [+4] Memory_contigAlloc> CMEM_alloc(0x400) = 0x4cf5c000.
    [t=0x0000d6c2] [tid=0x400e92f0] ti.sdo.ce.osal.Memory: [+4] Memory_contigAlloc> CMEM_getPhys(0x4cf5c000) = 0x97ffe000.
    [t=0x0000d73d] [tid=0x400e92f0] ti.sdo.ce.osal.Memory: [+4] Memory_contigAlloc> CMEM_alloc(0x80) = 0x4cfc2000.
    [t=0x0000d7a2] [tid=0x400e92f0] ti.sdo.ce.osal.Memory: [+4] Memory_contigAlloc> CMEM_getPhys(0x4cfc2000) = 0x97ffd000.
    [t=0x0000d9ed] [tid=0x4cdbc490] ti.sdo.ce.ipc.Processor: [+1] daemon> thread created.
    [t=0x0000da62] [tid=0x4cdbc490] ti.sdo.ce.ipc.Processor: [+E] getCmd_d> Enter (proc=0x4cdbbdc4)
    [t=0x0000e32f] [tid=0x400e92f0] ti.sdo.ce.Engine: [+E] Engine_open> Enter('remote_copy_DSP', 0xbeec2b38, 0xbeec2ac4)
    [t=0x0000e3c7] [tid=0x400e92f0] ti.sdo.ce.Engine: [+1] Engine_open> desc->memMap [0x0], desc->useExtLoader [0]
    [t=0x0000e429] [tid=0x400e92f0] ti.sdo.ce.Engine: [+E] rmsInit> Enter(engine=0xd5ab8, ec=0xbeec2ac4)
    [t=0x0000e48d] [tid=0x400e92f0] ti.sdo.ce.Engine: [+E] rmsInit> engine->desc = 0xd5730
    [t=0x0000e4d6] [tid=0x400e92f0] ti.sdo.ce.Engine: [+E] rmsInit> engine->desc->algTab = 0x0
    [t=0x0000e522] [tid=0x400e92f0] ti.sdo.ce.Engine: [+E] rmsInit> engine has server!
    [t=0x0000e567] [tid=0x400e92f0] ti.sdo.ce.Engine: [+E] rmsInit> engine->procId = DSP
    [t=0x0000e5b6] [tid=0x400e92f0] ti.sdo.ce.Engine: [+E] rmsInit> engine->coreId = 0
    [t=0x0000e5ff] [tid=0x400e92f0] ti.sdo.ce.Engine: [+E] rserverOpen('all_DSP.xe674'), count = 0
    [t=0x0000e64e] [tid=0x400e92f0] ti.sdo.ce.Engine: [+E] rserverOpen >, memMap = 0x0, useExtLoader = 0
    [t=0x0000e6a2] [tid=0x400e92f0] ti.sdo.ce.ipc.Processor: [+E] Processor_create> Enter(imageName='all_DSP.xe674', memMap='(null)', attrs=0xbeec2aa4)
    [t=0x0000f70e] [tid=0x400e92f0] ti.sdo.ce.ipc.Processor: [+E] doCmd> Enter (cmdId=1, proc=0xd5b00)
    [t=0x0000f7f9] [tid=0x4cdbc490] ti.sdo.ce.ipc.Processor: [+X] getCmd_d> Exit (result=1)
    [t=0x0000f850] [tid=0x4cdbc490] ti.sdo.ce.ipc.Processor: [+E] Processor_create_d> Enter(proc=0xd5b00)
    [t=0x0000f8a4] [tid=0x4cdbc490] ti.sdo.ce.ipc.Processor: [+2] Processor_create_d> Retrieving CPU ID for 'DSP'...
    [t=0x0000f903] [tid=0x4cdbc490] ti.sdo.ce.ipc.Processor: [+2] Processor_create_d> Opening DSP ProcMgr for cpuId 0...
    [t=0x0000fcd2] [tid=0x4cdbc490] ti.sdo.ce.ipc.Processor: [+2] Processor_create_d> Attaching to DSP...
    [t=0x00010a90] [tid=0x4cdbc490] ti.sdo.ce.ipc.Processor: [+2] Processor_create_d> Loading all_DSP.xe674 on DSP (1 args)...
    [t=0x0003c205] [tid=0x4cdbc490] ti.sdo.ce.ipc.Processor: [+2] Processor_create_d> calling Ipc_control(LOADCALLBACK)...
    [t=0x0003d724] [tid=0x4cdbc490] ti.sdo.ce.ipc.Processor: [+2] Processor_create_d> Ipc_control(LOADCALLBACK) status: 0
    [t=0x0003d9eb] [tid=0x4cdbc490] ti.sdo.ce.ipc.Processor: [+2] Processor_create_d> Starting DSP ...
    [t=0x000428d7] [tid=0x4cdbc490] ti.sdo.ce.ipc.Processor: [+2] Processor_create_d> Ipc_control(STARTCALLBACK) status: 0
    [t=0x00042d45] [tid=0x4cdbc490] ti.sdo.ce.ipc.Processor: [+2] Processor_create_d> calling HeapBufMP_create(): nblocks 64, blocksize 0x1000
    [t=0x00044735] [tid=0x4cdbc490] ti.sdo.ce.ipc.Processor: [+2] Processor_create_d> MessageQ_registerHeap(heapH: 0xd6158, heapId: 0)
    [t=0x00044ee7] [tid=0x4cdbc490] ti.sdo.ce.ipc.Processor: [+1] Processor_create_d> CMEM block #0 found, doing ProcMgr_map(0x96c00000, 0x1400000)...
    [t=0x00045046] [tid=0x4cdbc490] ti.sdo.ce.ipc.Processor: [+2] Processor_create_d> return (1)
    [t=0x0004513c] [tid=0x400e92f0] ti.sdo.ce.ipc.Processor: [+X] doCmd> Exit (result=1)
    [t=0x00047985] [tid=0x400e92f0] ti.sdo.ce.ipc.Processor: [+X] Processor_create> return (0xd5b00)
    [t=0x00047a39] [tid=0x400e92f0] ti.sdo.ce.Engine: [+X] rserverOpen('all_DSP.xe674'): 0xd56b8 done.
    [t=0x00048deb] [tid=0x400e92f0] ti.sdo.ce.Engine: [+E] checkServer(0xd5ab8)

    My IPC related config is :
    
    
    /* IPC-related config */
    xdc.useModule('ti.sdo.ce.ipc.dsplink.dsp.Settings');
    var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
    var settings = xdc.useModule('ti.sdo.ipc.family.Settings');
    var procNames = settings.getDeviceProcNames();

    MultiProc.setConfig("DSP", procNames);

    var SharedRegion_map = {};
    SharedRegion_map["SysLink: HOST<--->DSP"] = 0;
    SharedRegion_map["Ipc"] = 1;
    var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
    var syslinkSharedMem = Program.cpu.memoryMap["DDR3_SR0"];
    var ipcSharedMem = Program.cpu.memoryMap["DDR3_SR1"];
    var entry = new SharedRegion.Entry();

    entry.base = syslinkSharedMem.base;
    entry.len = syslinkSharedMem.len;
    entry.ownerProcId = MultiProc.getIdMeta("HOST");
    entry.isValid = true;
    entry.name = "SYSLINK";

    SharedRegion.setEntryMeta(
    SharedRegion_map["SysLink: HOST<--->DSP"], /* index */
    entry
    );

    var entry2 = new SharedRegion.Entry();

    entry2.base = ipcSharedMem.base;
    entry2.len = ipcSharedMem.len;
    entry2.ownerProcId = MultiProc.getIdMeta("HOST");
    entry2.isValid = true;
    entry2.createHeap = true;
    entry2.cacheEnable = true;
    entry2.name = "SR1";

    // To allow DSP servers to run with M3 firmware
    //SharedRegion.setEntryMeta(
    // SharedRegion_map["Ipc"], /* index */
    // entry2
    //);

    /*
    * @(#) ti.sdo.ce.examples.servers.all_codecs; 1, 0, 0,261; 12-2-2011 14:52:49; /db/atree/library/trees/ce/ce-s25x/src/ xlibrary

    */
    
    
  • RV,

    Sorry to know you are runnng into this issues. This is the memory map that I am using in the server we have tested.

    ["DDR3_DSP", {
         comment: "DDR3 Memory reserved for use by the C674",
         name: "DDR3_DSP",
         base: 0x99500000,
         len:  0x00c00000    /* 12 MB (Default memory reserved for c674x changed based on size of the DSP code)*/
    }],
    ["DDRALGHEAP", {
         comment: "DDR3 Memory reserved for use by algorithms on the C674",
         name: "DDRALGHEAP",
         base: 0x98000000,
         len:  0x00400000    /* 4 MB (Region used by algs and codec engine for memory allocations)*/
    }],
    ["DDR3_SR1", {
          comment: "DDR3 Memory reserved for use by SharedRegion 1",
          name: "DDR3_SR1",
          base: 0x99400000,
          len:  0x00100000    /* 1 MB (Reserved)*/
    }],
    ["DDR3_SR0", {
          comment: "DDR3 Memory reserved for use by SharedRegion 0",
          name: "DDR3_SR0",
          base: 0x9F700000,
          len:  0x00200000    /* 2 MB (Reserved)*/
    }],

    With CMEM loaded at phys_start : 0x96C00000 to phys_end : 0x98000000. Can you also check your ARM side configuration file to see what the Processor shared region Id and heapId is used.

    Here is the ARM side configuration from my app.

    /* use and configure the osal. */

    var osalGlobal = xdc.useModule('ti.sdo.ce.osal.Global');

    osalGlobal.runtimeEnv = osalGlobal.DSPLINK_LINUX;

    xdc.useModule('ti.sdo.xdcruntime.linux.Settings');

    xdc.useModule('ti.sdo.ce.osal.linux.Settings');

    xdc.loadPackage('ti.syslink').profile = 'standard';

     

    var common = xdc.loadCapsule('../examples/ti/sdo/ce/examples/buildutils/common_sys.cfg');

    var Proc = xdc.useModule('ti.sdo.ce.ipc.dsplink.Processor');

     

    // The following values should be created as part of Engine.createFromServer().

    // For now, we need to match values in the platform's memory map.

    //Proc.sharedRegionId = common.SharedRegion_map["Ipc"];

    //Proc.heapId = common.MessageQ_heapMap["Ipc"];

    Proc.sharedRegionId = 0;  //   <---  Change for EZSDK memory alignment

    Proc.heapId = 3; //<---  Change for EZSDK memory alignment

     

    // Use the Linux ipc

    var ipcSettings = xdc.useModule('ti.sdo.ce.ipc.Settings');

    var dsplinkIpc = xdc.useModule('ti.sdo.ce.ipc.dsplink.Ipc');

    dsplinkIpc.usePowerManagement = false;

    ipcSettings.ipc = dsplinkIpc;

    /*

     *  ======== Engine Configuration ========

     */

    var Engine = xdc.useModule('ti.sdo.ce.Engine');

     

    var demoEngine = Engine.createFromServer(

        "ti8148",

        "./bin/ti814x.xe674",

        "ti.unitservers.ti814x"

        );

    From your debug code it looks like there is an issue with MessageQ heapMap configuration. Could you verify your configurations aligns with my configuration and let us know if this resolved the issue that you are seeing.

    Regards,

    Rahul

     

  • Rahul,

    Thanks for your input. With your changes, I am getting a little furthur:

    [DSP] [t=+000,120 us] [tid=0x9958e718] ti.sdo.fc.dskt2: [+E] _DSKT2_isSharedScratchAddr> Enter (scratchMutexId=2, addr=0x98000768)
    [DSP] [t=+000,134 us] [tid=0x9958e718] ti.sdo.fc.dskt2: [+X] _DSKT2_isSharedScratch> Exit (status=0 )
    [DSP] [t=+000,105 us] [tid=0x9958e718] ti.sdo.fc.dskt2: [+X] _DSKT2_freeAllocatedMemory> Exit (returnVal=1)
    [DSP] [t=+000,097 us] [tid=0x9958e718] ti.sdo.fc.dskt2: [+E] _DSKT2_usesInternalScratch> Enter (numRecs=1)
    [DSP] [t=+000,097 us] [tid=0x9958e718] ti.sdo.fc.dskt2: [+X] _DSKT2_usesInternalScratch> Exit (returnVal=0)
    [DSP] [t=+000,094 us] [tid=0x9958e718] ti.sdo.fc.dskt2: [+X] _DSKT2_freeInstanceMemory> Exit (returnVal=1)
    [DSP] [t=+000,119 us] [tid=0x9958e718] ti.sdo.fc.dskt2: [+E] _DSKT2_exit> Enter
    [DSP] [t=+000,445 us] [tid=0x9958e718] ti.sdo.fc.dskt2: [+X] _DSKT2_exit> Exit
    [DSP] [t=+000,087 us] [tid=0x9958e718] ti.sdo.fc.dskt2: [+X] DSKT2_freeAlg> Exit
    [DSP] [t=+000,079 us] [tid=0x9958e718] ti.sdo.ce.osal.Memory: [+E] Memory_free> Enter(addr=0x9958ffb0, size=0x10, params=0x0)
    [DSP] [t=+000,124 us] [tid=0x9958e718] ti.sdo.ce.osal.Memory: [+X] Memory_free> Exit
    [DSP] [t=+000,083 us] [tid=0x9958e718] ti.sdo.ce.alg.Algorithm: [+X] Algorithm_delete> Exit
    [DSP] [t=+000,[t=0x0009347f] [tid=0x400e92f0] ti.sdo.ce.Engine: [+3] Engine_fwriteTrace(): requesting DSP trace @0x9347b ...
    [t=0x000934e0] [tid=0x400e92f0] ti.sdo.ce.ipc.Comm: [+E] Comm_put> Enter(msgqId=0x0, msg=0x403ecf80)
    [t=0x0009355a] [tid=0x400e92f0] ti.sdo.ce.ipc.Comm: [+X] Comm_put> return (0)
    [t=0x000935a2] [tid=0x400e92f0] ti.sdo.ce.ipc.Comm: [+E] Comm_get> Enter(comm=0xd6188, msg=0xbeba6a54, timeout=-1)
    [t=0x0009385c] [tid=0x400e92f0] ti.sdo.ce.ipc.Comm: [+X] Comm_get> MSGQ_get() status=0x0, return (0)
    [t=0x000938b6] [tid=0x400e92f0] ti.sdo.ce.Engine: [+3] Engine_fwriteTrace> got 1528 chars @0x9347b (253 still avail, max: 32744, lost: 0)
    
    
    In codec engine examples/ti/sdo/ce/examples/buildutils" EZSDK has msq heap memory as :
    /*
    * ======== common_sys.cfg ========
    */

    /*
    * ======== Application Global Configuration ========
    */

    /* system wide shared region assignments */
    var SharedRegion_map = {};
    SharedRegion_map["SysLink: HOST<--->DSP"] = 0;
    SharedRegion_map["Ipc"] = 1;
    SharedRegion_map["unused 02"] = 2;
    SharedRegion_map["unused 03"] = 3;
    SharedRegion_map["unused 04"] = 4;
    SharedRegion_map["unused 05"] = 5;
    SharedRegion_map["unused 06"] = 6;
    SharedRegion_map["unused 07"] = 7;
    SharedRegion_map["unused 08"] = 8;
    SharedRegion_map["unused 09"] = 9;
    SharedRegion_map["unused 10"] = 10;
    SharedRegion_map["unused 11"] = 11;
    SharedRegion_map["unused 12"] = 12;
    SharedRegion_map["unused 13"] = 13;
    SharedRegion_map["unused 14"] = 14;
    SharedRegion_map["unused 15"] = 15;

    /* system wide MessageQ heapId assignments */
    var MessageQ_heapMap = {};
    MessageQ_heapMap["Ipc"] = 0; /* application */
    MessageQ_heapMap["App"] = 1; /* application */
    
    
    In the same folder remote.cfg is as follows:
    
    
        osalGlobal.runtimeEnv = osalGlobal.DSPLINK_LINUX;
    xdc.useModule('ti.sdo.xdcruntime.linux.Settings');
    xdc.useModule('ti.sdo.ce.osal.linux.Settings');

    var common = xdc.loadCapsule('ti/sdo/ce/examples/buildutils/common_sys.cfg');
    var Processor = xdc.useModule('ti.sdo.ce.ipc.dsplink.Processor');

    /* first set module defaults ... */
    Processor.heapId = 3;
    Processor.sharedRegionId = 0;

    /* ... then add per-processor settings */
    var coreComm = {};
    coreComm.numMsgs = 64;
    coreComm.msgSize = 4 * 1024;
    coreComm.heapId = 3;
    coreComm.userCreatedHeap = false;
    coreComm.sharedRegionId = 0;
    if (platform.match("TI814X") || platform.match("TI816X") ||
    platform.match("DM8148") || platform.match("DM8168")) {
    Processor.coreComm.$add(coreComm);
    Processor.coreComm.$add(coreComm);
    Processor.coreComm.$add(coreComm);
    Processor.coreComm.$add(coreComm);
    }
    else {
    Processor.coreComm.$add(coreComm);
    Processor.coreComm.$add(coreComm);
    }

    // Use the Linux ipc
    var ipcSettings = xdc.useModule('ti.sdo.ce.ipc.Settings');
    var dsplinkIpc = xdc.useModule('ti.sdo.ce.ipc.dsplink.Ipc');
    ipcSettings.ipc = dsplinkIpc;
    }
    
    
    
    
    If you can post your complete DSP unit server settings along with app.cfg file as well for the latest EZSDK, I should be able to get a little more out of it. 
    Codec Engine examples on latest EZSDK don't work with video firmware , with the default memory map, unfortunately.
  • Please find the server files attached below:

    1460.ti814x.tar.gz

    My application configuration file and the loadmodules script are as mentioned below:

    2502.testapp.cfg

    http://e2e.ti.com/cfs-file.ashx/__key/CommunityServer-Discussions-Components-Files/717/3348.loadmodules.sh

    I haven`t tried modifying the codec engine examples myself. The server files that I created are modified version of the server files generated out of the Genserver wizard which I assume is the way you are creating your server.

    Regards,

    Rahul

  • After changing this

        if (platform.match("TI814X") || platform.match("TI816X") ||
    platform.match("DM8148") || platform.match("DM8168")) {
    Processor.coreComm.$add(coreComm);
    Processor.coreComm.$add(coreComm);
    Processor.coreComm.$add(coreComm);
    Processor.coreComm.$add(coreComm);
    }
     to 
        if (platform.match("TI814X") || platform.match("TI816X") ||
    platform.match("DM8148") || platform.match("DM8168")) {
    Processor.coreComm.$add(coreComm);
    Processor.coreComm.$add(coreComm);
    }


    I can get codec engine samples to work with omx video running.


    Changes are as follows:

    /*
    * ======== remote.cfg ========
    */

    /* set "serverName" to point at the platform-specific server executable */
    var platform = Program.platformName;
    var platBinName = platform.replace(/\:/g, "_").replace(/\./g, "_");

    var serverSuffix = "";
    var serverIds = Program.build.cfgArgs.serverIds;
    if (serverIds == null || serverIds.length == 0) {
    serverIds = [""];
    }

    var Engine = xdc.useModule('ti.sdo.ce.Engine');
    var myEngine = new Array();

    for (var i = 0; i < serverIds.length; i++) {

    //print("platform: " + platform + "\n");
    // The following line matches both evmOMAPL137 and evmOMAPL138
    // ... but there's got to be a better way... :(
    //TODO: clean up these hard-coded assumptions

    if (platform.match("evmOMAPL13")) {
    serverSuffix = "674";
    }
    else if (platform.match("ti.platforms.evmTI814X") ||
    platform.match("ti.platforms.evmDM8148") ||
    platform.match("ti.platforms.evmTI816X") ||
    platform.match("ti.platforms.evmDM8168")) {
    if (serverIds[i] == "DSP") {
    /* assume ELF */
    serverSuffix = "e674";
    }
    else {
    /* assume ELF */
    serverSuffix = "em3";
    }
    }
    else {
    serverSuffix = "64P";
    }

    var serverName = "";
    if (serverIds[i] != null && serverIds[i] != "") {
    var serverBaseName = "/all_" + serverIds[i];
    var engineName = "remote_copy_" + serverIds[i];
    }
    else {
    var serverBaseName = "/all";
    var engineName = "remote_copy";
    }
    serverName = "bin/" + platBinName + serverBaseName + ".x" + serverSuffix;

    try {
    /*
    * ======== Engine Configuration ========
    */
    //print("creating engine named '" + engineName + "'");
    myEngine.push(Engine.createFromServer(
    engineName, // Engine name (as referred to in the C app)
    serverName, // path to server exe, relative to its package dir
    "ti.sdo.ce.examples.servers.all_codecs" // server package
    ));
    }
    catch (e) {
    if (serverIds[i].match(/M3$/)) {
    // No M3 Server found - that's ok
    //print("Skipping Engine for M3 server " + serverIds[i]);
    }
    else {
    // No DSP Server found - not ok
    throw(e);
    }
    }
    }

    /* use and configure the osal. */
    var osalGlobal = xdc.useModule('ti.sdo.ce.osal.Global');

    if (Program.build.target.os == "WindowsCE") {
    throw ("WinCE not yet supported");
    // osalGlobal.runtimeEnv = osalGlobal.DSPLINK_WINCE;
    }
    else if (Program.build.target.os == "Linux") {
    osalGlobal.runtimeEnv = osalGlobal.DSPLINK_LINUX;
    xdc.useModule('ti.sdo.xdcruntime.linux.Settings');
    xdc.useModule('ti.sdo.ce.osal.linux.Settings');

    var common = xdc.loadCapsule('ti/sdo/ce/examples/buildutils/common_sys.cfg');
    var Processor = xdc.useModule('ti.sdo.ce.ipc.dsplink.Processor');

    /* first set module defaults ... */
    Processor.heapId = 3;
    Processor.sharedRegionId = 0;

    /* ... then add per-processor settings */
    var coreComm = {};
    coreComm.numMsgs = 64;
    coreComm.msgSize = 4 * 1024;
    coreComm.heapId = 3;
    coreComm.userCreatedHeap = false;
    coreComm.sharedRegionId = 0;
    if (platform.match("TI814X") || platform.match("TI816X") ||
    platform.match("DM8148") || platform.match("DM8168")) {
    Processor.coreComm.$add(coreComm);
    Processor.coreComm.$add(coreComm);

    }
    else {
    Processor.coreComm.$add(coreComm);
    Processor.coreComm.$add(coreComm);
    }

    // Use the Linux ipc
    var ipcSettings = xdc.useModule('ti.sdo.ce.ipc.Settings');
    var dsplinkIpc = xdc.useModule('ti.sdo.ce.ipc.dsplink.Ipc');
    ipcSettings.ipc = dsplinkIpc;
    }

    // Set up logging
    xdc.loadCapsule('ti/sdo/ce/examples/buildutils/common_log.cfg');
    /*
    * @(#) ti.sdo.ce.examples.buildutils; 1, 0, 0,297; 12-2-2011 14:51:33; /db/atree/library/trees/ce/ce-s25x/src/ xlibrary

    */
    
    
    
    
    
    
    In app folder:
    
    
    /*
    * ======== remote.cfg ========
    */
    var platform = Program.platformName;

    /* Bring in CE */
    xdc.useModule('ti.sdo.ce.Engine');

    /* Bring in UNIVERSAL support */
    xdc.loadPackage('ti.sdo.ce.universal');

    /* Assert we're on Linux */
    if (Program.build.target.os != "Linux") {
    throw ("Unsupported OS");
    }

    /* use and configure the osal. */
    var osalGlobal = xdc.useModule('ti.sdo.ce.osal.Global');
    osalGlobal.runtimeEnv = osalGlobal.DSPLINK_LINUX;

    /* Configure IPC with settings consistent with the server config */
    var common = xdc.loadCapsule('ti/sdo/ce/examples/buildutils/common_sys.cfg');
    var Processor = xdc.useModule('ti.sdo.ce.ipc.dsplink.Processor');
    Processor.heapId = 3; // <--- Change for EZSDK memory alignment
    Processor.sharedRegionId = 0; // <--- Change for EZSDK memory alignment

    // Set up logging
    xdc.loadCapsule('ti/sdo/ce/examples/buildutils/common_log.cfg');
    /*
    * @(#) ti.sdo.ce.examples.apps.universal_copy; 1, 0, 0,125; 12-2-2011 14:51:15; /db/atree/library/trees/ce/ce-s25x/src/ xlibrary

    */
    For server bld file :
    
    
    /*
    * ======== package.bld ========
    */

    var Build = xdc.useModule('xdc.bld.BuildEnvironment');
    var Pkg = xdc.useModule('xdc.bld.PackageContents');

    var serverBaseName = "all";

    /* when constructing a release, release everything */
    //Pkg.attrs.exportExe = true;
    Pkg.otherFiles = [
    "main.c", "setid.c", "all_mc.cfg", "all_syslink.cfg", "heaps.cfg",
    "link.cmd", "package.bld", "_config.bld", "makefile",
    "ti_platforms_evm3530.cfg", "ti_platforms_evm6472.cfg",
    "ti_platforms_evmDM8148.cfg",
    "ti_platforms_evmTI814X.cfg", "ti_platforms_evmTI816X.cfg",
    "serverplatforms.xs", "package/info"
    ];

    var DM8148_DSP_ExtMemMap = {

    DDR3_DSP: {
    comment: "DDR3 Memory reserved for use by the C674",
    name: "DDR3_DSP",
    base: 0x99500000,
    len: 0xc00000 /* 12 MB (Default memory reserved for c674x changed based on size of the DSP code)*/
    },
    DDRALGHEAP: {
    comment: "DDR3 Memory reserved for use by algorithms on the C674",
    name: "DDRALGHEAP",
    base: 0x98000000,
    len: 0x00400000 /* 4 MB (Region used by algs and codec engine for memory allocations) */
    },
    DDR3_SR1: {
    comment: "DDR3 Memory reserved for use by SharedRegion 1 (IPC)",
    name: "DDR3_SR1",
    base: 0x99400000,
    len: 0x00100000 /* 1 MB */
    },
    DDR3_SR0: {
    comment: "DDR3 Memory reserved for use by SharedRegion 0 (SYSLINK)",
    name: "DDR3_SR0",
    base: 0x9F700000,
    len: 0x00200000 /* 2 MB */
    },

    };

    xdc.useModule('xdc.bld.BuildEnvironment');
    // set'theProf' to 'debug' for faster builds (with lower performance)
    var theProf = 'debug';//'whole_program_debug';

    /* bin/ is a generated directory that 'xdc clean' should remove */
    Pkg.generatedFiles.$add("bin/");

    /*
    * When using this package with the CE examples build, xdcpaths.mak can be
    * used to determine which PROGRAMS to build for (e.g. APP_LOCAL or APP_CLIENT).
    *
    * If PROGRAMS is set via the XDCARGS, we respect that, and only build what's
    * requested. Else, we build everything we can.
    */
    var programs = undefined;
    for (x = 0; x < arguments.length; x++) {
    if (arguments[x].match(/^PROGRAMS=/)) {
    programs = arguments[x].split("=")[1];
    // print("programs: " + programs);
    }
    }

    for (var i = 0; i < Build.targets.length; i++) {

    if ((programs != undefined) && (!programs.match(/DSP_SERVER/))) {
    break;
    }

    var targ = Build.targets[i];

    /* only build for BIOS-based targets */
    if (targ.os == undefined) {

    /* No A8 Server yet */
    if (targ.isa == "v7A") {
    continue;
    }

    // print("building for target " + targ + " ...");

    /* Platforms were added to targ.platforms[] in config.bld */
    for (var j = 0; j < targ.platforms.length; j++) {
    var platform = targ.platforms[j];

    // print(" platform: " + platform);

    var platInst = Build.usePlatform(platform);
    var platMod = platInst.$module;

    if (platform.match(/simTesla/) || platform.match(/sdp4430/)) {
    // print(" skipping unsupported platform");
    continue;
    }

    if (platform.match(/evm6472|evm6474|6608|6616|6670|6678/)) {
    /* homogeneous multicore, IPC-based Server */
    addExe(targ, platform, "all_mc");
    }
    else {

    /* platform instances used by this package */
    Build.platformTable["ti.platforms.evmTI814X:DSP"] = {
    l1DMode:"32k",
    l1PMode:"32k",
    l2Mode:"0k",
    externalMemoryMap: [
    [ "DDR3_DSP", DM8148_DSP_ExtMemMap.DDR3_DSP ],
    [ "DDRALGHEAP", DM8148_DSP_ExtMemMap.DDRALGHEAP ],
    [ "DDR3_SR1", DM8148_DSP_ExtMemMap.DDR3_SR1 ],
    [ "DDR3_SR0", DM8148_DSP_ExtMemMap.DDR3_SR0 ]
    ],
    codeMemory: "DDR3_DSP",
    dataMemory: "DDR3_DSP",
    stackMemory: "DDR3_DSP"
    };
    /* heterogeneous multicore, syslink-based Server */
    addExe(targ, platform, "all_syslink");
    }
    
    
    
    
    If using DMA , DMAN3 might have to be configured thus (haven't tested it out yet) in your all_syslink.cfg file
    
    
    if (lld == true) {

    print("Setting DMAN3's useExternalRM mode to TRUE");
    DMAN3.useExternalRM = true;
    DMAN3.numQdmaChannels = 1;

    var EDMA3 = xdc.useModule("ti.sdo.fc.edma3.Settings");

    EDMA3.persistentAllocFxn = "DSKT2_allocPersistent";
    EDMA3.persistentFreeFxn = "DSKT2_freePersistent";


    EDMA3.maxTccs[0] = 32;
    EDMA3.maxPaRams[0] = 48;
    }
    else {
    if (platformName.match(/DM8168/) || platformName.match(/DM8148/) ||
    platformName.match(/TI816X/) || platformName.match(/TI814X/)) {
    DMAN3.qdmaPaRamBase = 0x09004000;
    }

            DMAN3.qdmaPaRamBase  = 0x09004000;
    DMAN3.maxPaRamEntries = 512;
    DMAN3.paRamBaseIndex = 129; // Since all Params above 128 are available for DSP, let's make it simple and start from there.
    DMAN3.numPaRamEntries = 48; // number of PaRAM sets exclusively usedby DMAN, application dependent
    DMAN3.nullPaRamIndex = 128; //By default, PaRam 0 is used, but often QDMA channels by default are mapped to PaRam 0, so lets switch to something safer.
    DMAN3.numQdmaChannels = 6; // number of device's QDMA channels to use
    DMAN3.qdmaChannels = [2,3,4,5,6,7]; // QDMA channels 2-7 are available for use
    DMAN3.tccAllocationMaskL = 0xfc00c003; // bit mask indicating which TCCs 0..31 are available for use, created using above table.
    DMAN3.tccAllocationMaskH = 0xFF0F0000; // bit mask indicating which TCCs 32..63 are available for use, created using above table.
    DMAN3.numPaRamGroup[0] = 48; //number of PaRAM sets for scratch group 0, application dependent number.
    DMAN3.numTccGroup[0] = 22; //number of TCCs assigned to scratch group 0, application dependent BUT reducing this to 22 since that is the maximum number
    //of TCCs available to DSP per table above.

    DMAN3.queuePri = [2,2]; //This changes the default queue priorities for DMA from 3,7 which seem to be causing the issue.

    }


    }
    }
    
    
     
     
    RV
     
     


     
  • Good to know that you were able to get things to work and Thanks for posting the solution as this will help others who may be pursuing this route.

    Regards,

    Rahul

  • I can confirm that DSP is working with DMA and running our custom IUNIVERSAL codec. I updated the DMA configuration in my previous post . This is the one that works for me on TI81XX and I had to offset IRAM address by 0x30000000 in acpy3 api's:

     DMAN3.qdmaPaRamBase = 0x09004000;
    DMAN3.maxPaRamEntries = 512;
    DMAN3.paRamBaseIndex = 129; // Since all Params above 128 are available for DSP, let's make it simple and start from there.
    DMAN3.numPaRamEntries = 48; // number of PaRAM sets exclusively usedby DMAN, application dependent
    DMAN3.nullPaRamIndex = 128; //By default, PaRam 0 is used, but often QDMA channels by default are mapped to PaRam 0, so lets switch to something safer.
    DMAN3.numQdmaChannels = 6; // number of device's QDMA channels to use
    DMAN3.qdmaChannels = [2,3,4,5,6,7]; // QDMA channels 2-7 are available for use
    DMAN3.tccAllocationMaskL = 0xfc00c003; // bit mask indicating which TCCs 0..31 are available for use, created using above table.
    DMAN3.tccAllocationMaskH = 0xFF0F0000; // bit mask indicating which TCCs 32..63 are available for use, created using above table.
    DMAN3.numPaRamGroup[0] = 48; //number of PaRAM sets for scratch group 0, application dependent number.
    DMAN3.numTccGroup[0] = 22; //number of TCCs assigned to scratch group 0, application dependent BUT reducing this to 22 since that is the maximum number
    //of TCCs available to DSP per table above.

    DMAN3.queuePri = [2,2]; //This changes the default queue priorities for DMA from 3,7 which seem to be causing the issue.
    With this I can get v4Linux capture driver working with DSP.
    
    
    Thanks
    RV
  • Hi,

    Rahul,

    I am working with dm8168evm and ezsdk5.05. When trying to modify the video_copy example, I met the problem of unable to get ipc callback. And I dont understand why you comment out entry2 for ipc.  The user guide here http://processors.wiki.ti.com/index.php/Codec_Engine_Server_Integrator_User%27s_Guide#IPC_Configuration

    said "SharedRegion 1 is used for allocating VISA messages that are passed between the host application and the Codec server (although SharedRegion 0 could also have been used for the VISA messages). "

    Could you give more details?

    And I don't know where to get stuck information, What I received from the console is:

    root@dm816x-evm:~/video_copy# ./app_remote.xv5T -s xe674                        
    [t=0x00003b60] [tid=0x4004c000] xdc.runtime.Main: [+2] main> ti.sdo.ce.examples.
    apps.video_copy                                                                 
    [t=0x00004145] [tid=0x4004c000] xdc.runtime.Main: [+1] App-> Application started
    , procId DSP engineName remote_copy_DSP input-file ./in.dat output-file ./out.da
    t.                                                                              
    *** Platform_startCallback: Ipc_attach timeout                                  
            Error [0xffffffff] at Line no: 2851 in file /swcoe/sdk/cm/netra/arago-tm
    p/work/dm816x-evm-none-linux-gnueabi/ti-syslink-2_20_00_14-r4j/syslink_2_20_00_1
    4/packages/ti/syslink/utils/hlos/knl/Linux/../../../../../../ti/syslink/family/h
    los/knl/ti81xx/Platform.c                                                       
    *** Ipc_control: Platform_startCallback failed!                                 
            Error [0xffffffff] at Line no: 853 in file /swcoe/sdk/cm/netra/arago-tmp
    /work/dm816x-evm-none-linux-gnueabi/ti-syslink-2_20_00_14-r4j/syslink_2_20_00_14
    /packages/ti/syslink/utils/hlos/knl/Linux/../../../../../../ti/syslink/ipc/hlos/
    knl/Ipc.c                                                                       
    ./app_remote.xv5T: error: can't open engine remote_copy_DSP                     
    [t=0x03a493c8] [tid=0x4004c000] xdc.runtime.Main: [+1] app done.

    How can I get the detail information when running the app just like RV post above.

    PS

    I have just modified the server and app(video_copy),no changes in codec and no video source.

    Regards,

    yang

  • Problems have been solved after assign coreComm.sharedRegionId = 0 in remote.cfg.