CSL questions

Hi All,

I would like to ask some questions on chip-suppor library.

There is a Chip-support library for C6000, described in SPRU401J. However,

In both

1. http://focus.ti.com/docs/toolsw/folders/print/sprc090.html
2. http://processors.wiki.ti.com/index.php/Chip_support_library

DM6437 or DM6431 are not listed. Does this mean C6000 CSL doesn't support them?

What is the relationship between C6000 and DavinCi chips? If DavinCi chips, in particular, DM6437/6431, are members of the C6000 family/class, why the document titled as "TMS320C6000 Chip Support Library API Reference Guide" doesn't support them?


Another question is that is CSL a must-to-use? Take the instance of I2C controlling for example, my EVM uses functions like:

I2C functions said:

Int16 EVMDM6437_I2C_write( Uint16 i2c_addr, Uint8* data, Uint16 len )
{
Int32 timeout, i;

I2C_ICCNT = len; // Set length
I2C_ICSAR = i2c_addr; // Set I2C slave address
I2C_ICMDR = ICMDR_STT // Set for Master Write
| ICMDR_TRX
| ICMDR_MST
| ICMDR_IRS
| ICMDR_FREE;

_wait( 10 ); // Short delay

for ( i = 0 ; i < len ; i++ )
{
I2C_ICDXR = data[i]; // Write

timeout = i2c_timeout;
do
{
if ( timeout-- < 0 )
{
EVMDM6437_I2C_reset( );
return -1;
}
} while ( ( I2C_ICSTR & ICSTR_ICXRDY ) == 0 );// Wait for Tx Ready
}

I2C_ICMDR |= ICMDR_STP; // Generate STOP

return 0;
}

and

Int16 EVMDM6437_I2C_read( Uint16 i2c_addr, Uint8* data, Uint16 len )
{
Int32 timeout, i;

I2C_ICCNT = len; // Set length
I2C_ICSAR = i2c_addr; // Set I2C slave address
I2C_ICMDR = ICMDR_STT // Set for Master Read
| ICMDR_MST
| ICMDR_IRS
| ICMDR_FREE;

_wait( 10 ); // Short delay

for ( i = 0 ; i < len ; i++ )
{
timeout = i2c_timeout;
do
{
if ( timeout-- < 0 )
{
EVMDM6437_I2C_reset( );
return -1;
}
} while ( ( I2C_ICSTR & ICSTR_ICRRDY ) == 0 );// Wait for Rx Ready

data[i] = I2C_ICDRR; // Read
}

I2C_ICMDR |= ICMDR_STP; // Generate STOP

return 0;
}

CSL reset said:

void I2C_reset(I2C_Handle hI2c) {

Uint32 gie;

gie = IRQ_globalDisable();

if (hI2c == INV) {
I2C_reset((I2C_Handle)(&(_I2C_deviceTable[0])));
#if (CHIP_6713 | CHIP_DA610 | CHIP_6413 | CHIP_6418 | CHIP_6410)
I2C_reset((I2C_Handle)(&(_I2C_deviceTable[1])));
#endif
} else {
I2C_RSETH(hI2c,I2COAR,I2C_I2COAR_DEFAULT);
I2C_RSETH(hI2c,I2CIER,I2C_I2CIER_DEFAULT);
I2C_RSETH(hI2c,I2CSTR,I2C_I2CSTR_DEFAULT);
I2C_RSETH(hI2c,I2CCLKL,I2C_I2CCLKL_DEFAULT);
I2C_RSETH(hI2c,I2CCLKH,I2C_I2CCLKH_DEFAULT);
I2C_RSETH(hI2c,I2CCNT,I2C_I2CCNT_DEFAULT);
I2C_RSETH(hI2c,I2CSAR,I2C_I2CSAR_DEFAULT);
I2C_RSETH(hI2c,I2CPSC,I2C_I2CPSC_DEFAULT);
I2C_RSETH(hI2c,I2CDXR,I2C_I2CDXR_DEFAULT);

while(I2C_RGETH(hI2c,I2CISRC)) /* Reading I2CISRC clears the interrupt flag */
;

I2C_RSETH(hI2c,I2CMDR,I2C_I2CMDR_DEFAULT); /* I2C is reset mode IRS=0 */

#if (CHIP_6413 | CHIP_6418 | CHIP_6410)
I2C_RSETH(hI2c,I2CEMDR,I2C_I2CEMDR_DEFAULT);
I2C_RSETH(hI2c,I2CPFUNC,I2C_I2CPFUNC_DEFAULT);
I2C_RSETH(hI2c,I2CPDIR,I2C_I2CPDIR_DEFAULT);
I2C_RSETH(hI2c,I2CPDOUT,I2C_I2CPDOUT_DEFAULT);
#endif
IRQ_reset(hI2c->eventId);
}

IRQ_globalRestore(gie);

return;
}

Spectrum EVM init() and reset() said:

Int16 EVMDM6437_I2C_init( )
{
I2C_ICMDR = 0; // Reset I2C
I2C_ICPSC = 13; // Config prescaler for 27MHz
I2C_ICCLKL = 5; // Config clk LOW for 100 kHz
I2C_ICCLKH = 5; // Config clk HIGH for 100 kHz
I2C_ICMDR |= ICMDR_IRS; // Release I2C from reset
return 0;
}

Int16 EVMDM6437_I2C_reset( )
{
EVMDM6437_I2C_close( );
EVMDM6437_I2C_init( );
return 0;
}

1. ICMDR
2. ICCLKL, ICCLKH
3. ICPSC

and the difference is only that CSL are more comprehensive, most likely due to its need to support multiple devices. So can I understand CSL's I2C fun ctions as a generalist's repertoire, and Spectrum EVMDM6437's I2C functions as a specialist's? Therefore as long as I have the EVM's function, there is no need for the CSL. Is this correct?

Does this apply to all CSL functions? Chapter 2-28:
Cache
Chip
...
DMA
...
GPIO
...
I2C
...
PCI
...
VP
...
XBUS
...



Looking forward to answers on this.


Zheng