Hello all,
I'll list off a few of my questions and I would be greatful for responses.
1. Is there any DSP example code from TI or else where using the VPIF with the DSP core?
2. How do you specify the address of where the raw captured data should be put in ram. In progressive mode the CMOS camera will continue outputing its data for a full picture. So there is no top/bottom field nor is there any luminance or chrominance because it outputs raw RGB data. So in raw data capture mode do you just use "C0TLUMA" Channel 0 top field luminance address register? Or are there other registers that need set?
3. "C0IMGOFFSET" is this just the size in memory for one row of the picture?
4. Is there a mistake on page 48 of SPRUGJ9-June 2009 (OMAP-L1348 VPIF User's Guide)? The comments on interrupt FRAME1 and FRAME0 both indicate that these interrupts in CCD/CMOS capture mode are enabling the line interval interrupt. From other parts of the manual it is my understanding that in this mode there are two interrupts, the line interrupt and the full frame/picture interrupt. Is this a type-O and FRAME1 is realy the full picture interrupt?
5. How do you configure the channel-n sub-picture "register CnSUBPIC"? and what is interest of this register?
Thanks for any help.
Fabien
Nobody can help me !!?
Thanks
Fab'
PS :
I used OMAP L138 with CCS .v5 on windows
i want used VPIF interface in Progressive CCD Raw capture mode.
I receives a lot of data in memory but are only zero ...(0x00000000).
I can't get the data that my FPGA sends me.
VPIF_REVID = 0x4C080A01;C0CTRL = 0x0120F404;C1CTRL = 0x00000404;C0TLUMA = 0xC3800000; //start address in DDR2CH0_SUBPIC_CFG = 0x00FF01FF;C0IMGOFFSET = 0x00000120; //288 linesCH1_SUBPIC_CFG = 0x00FF01FF;C1IMGOFFSET = 0x00000120; //288 linesC1TLUMA = 0xC3800000; //start address in DDR2REQSIZE = 0x00000100; //256 bytes
others register are set to zero.
After initialisation register, I active EN bit on C0CTRL and C1CTRL
C0CTRL = 0x0120F405;C1CTRL = 0x00000405;
Can you tell me what I do wrong?
Fabien,
Sorry for the delay in response on this post. You can find an example code on the logic PD website for interfacing the mt9v032 sensor with DSP on OMAPL138. It contains a CCSv4 project that implements this functionality using VPIF raw capture. I have attached the project here.
5417.OMAPL138_Image_sensor_test.zip
For the complete package login to logic pd website and download the 2.3.2 package of the BSL_WS package.
Hope this helps.
Regards,
Rahul
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Hello,
I want to use OV5640 sensor with VPIF Omap L138 in RAW mode. I can't do it. I think that my camera sends wrong Vsync signal and that is why in my program there is no interrupt to capture data. I think that Vsync should be high for long time not only one PCLK. Am I right? Maybe somebody has worked with this sensor.
So nobody can help me?? I discovered that when I have good signals v_valid and h_valid I don't get interrupt i my program. So I can say that I have problem with my code I think.I need tested configuration code for raw data vpif. I have tried do this for 2 weeks. I would be grateful for help.
Hi,
I think you can invert the incoming vertical pixel valid signal inside the vpif, or in the OV5640. There should be a register bit to accomplish this.
Michal