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OMAP35x, OMAP37x, DM37X POP Memory and JTAG

Bill Tucker
Prodigy 60 points


I would like to be able to test the POP memory that is soldered to the OMAP35x, OMAP37x, DM37x on our products.  Are the BSDL files that support the pins on top of the BGA that allow boundary scan testing access to memory/flash?

We have partnered with TI and are committed to using their products.  Having a JTAG solution would be a preferred method for dealing with test.

 

Bill T.

 

  • 0
    TI__Guru*** 125430 points

    The BSDL files partially support the PoP memory on top of these devices.  In particular, notice that SDRC_CLK and SDRC_NCLK are listed as "linkage".  Hence they are not able to be controlled.  On the flip side, I don't know of any memory devices that support boundary scan so beyond doing something like programming a NAND flash it's not clear to me how one would utilize this capability.  In other words, if you drive a signal on one of the SDRC pins, there's no way to read back the corresponding value from the mDDR, which is how I would generally expect boundary scan to be utilized.

  • 0 in reply to Brad Griffis
    Prodigy 60 points

    Thank you for your reply.  Boundary scan devices can be used to test non-bscan devices if the necessary pins are accessible to the boundary scan device.  A virtual silicon nails test can be developed for flash and ram devices.  In this case we have both DDR and NAND flash as the POP device.  Just polling the NAND flash for it's Mfg/Device/Revision ID code is enough to determine that the POP is soldered properly and likely will work when the assembly is present for functional test. 

     

    Regards

     

  • 0 in reply to Bill Tucker
    TI__Guru*** 125430 points

    Bill Tucker said:
    A virtual silicon nails test can be developed for flash and ram devices.

    I see -- thank you for clarifying.  That will be possible for the NAND, but not for the DDR since you will not be able to drive the clock pins since those are linkage.