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Digital Signal Processors (DSP)
OMAP35x Processors Forum
Cannot Access OMAP3530 GPMC Registers
I am using an OMAP3530 on a Beagle Board. I cannot seem to access any of the GPMC registers (starting at 0x6E000000). When my code tries to access (read or write), an error is thrown. When I use the Registers window in CCS5, every GPMC register reads 0x0BAD0BAD. This is the same behavior I had when trying to access the GPIO1 Module registers until I found how to enable the clocks for that particular module. However, I've searched a few times through the Technical Reference manual and have not found anything that points me to something to change to gain access to the GPMC registers.
While trying to sort this out, I also noticed I cannot access the SMS or SDRC registers either. I have no problem accessing the CM, SCM, and PRM registers.
I'm sure I'm missing something simple, but not sure what it is. Thanks for any help.
Any ideas? Did I miss something obvious in the manual?
have you configured the ICLK and FCLK
I think this is the same problem I am having. No, I have not enabled FCLK, because when I try to MMAP /dev/mem for that address, it fails.
The GPMC use a single clock, GPMC_FCLK, which comes internally from the power, reset, and clock-management (PRCM) module and runs at the L3 interconnect frequency. Its source is the PRCM module, CORE_L3_ICLK output. CORE_L3_ICLK belongs to the L3 interconnect clock domain.
Have you enable configured this?
Thanks for the reply!
Well, that is exactly my problem. When I try to memory map that register space, my MMAP call fails... So when I try to enable that clock, I can't.
Seems I must recompile the project like this person: https://groups.google.com/forum/?fromgroups#!topic/beagleboard/cFgfEEYp19k
But that is a big hassle. Any other options?
Actually, this does work. The problem I was having was that the clock was off in my OS and kernel source. Moving to the latest ubunutu-precise & kernel 3.2 was a huge step in the right direction.
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