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TI Home » TI E2E Community » Support Forums » Digital Signal Processors (DSP) » OMAP™ Processors » OMAP35x Processors Forum » Cannot Access OMAP3530 GPMC Registers
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  • Cannot Access OMAP3530 GPMC Registers

    Cannot Access OMAP3530 GPMC Registers

    This question is not answered
    wlater
    Posted by wlater
    on Apr 14 2012 15:08 PM
    Intellectual260 points

    I am using an OMAP3530 on a Beagle Board. I cannot seem to access any of the GPMC registers (starting at 0x6E000000). When my code tries to access (read or write), an error is thrown. When I use the Registers window in CCS5, every GPMC register reads 0x0BAD0BAD. This is the same behavior I had when trying to access the GPIO1 Module registers until I found how to enable the clocks for that particular module. However, I've searched a few times through the Technical Reference manual and have not found anything that points me to something to change to gain access to the GPMC registers.

    While trying to sort this out, I also noticed I cannot access the SMS or SDRC registers either. I have no problem accessing the CM, SCM, and PRM registers.

    I'm sure I'm missing something simple, but not sure what it is. Thanks for any help.

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    • wlater
      Posted by wlater
      on Apr 19 2012 09:45 AM
      Intellectual260 points

      Bumped.

      Any ideas? Did I miss something obvious in the manual?

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    • Jethin Sekhar
      Posted by Jethin Sekhar
      on Apr 27 2012 00:29 AM
      Expert1130 points

      walter,

      have you configured the ICLK and FCLK

      regards

      Jethin

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    • terpaccount
      Posted by terpaccount
      on Apr 27 2012 17:30 PM
      Prodigy60 points

      Hi There,

      I think this is the same problem I am having.  No, I have not enabled FCLK, because when I try to MMAP /dev/mem for that address, it fails.

      Any suggestions?

      Thank You

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    • Jethin Sekhar
      Posted by Jethin Sekhar
      on Apr 28 2012 01:36 AM
      Expert1130 points

      hi Walter,

      The GPMC use a single clock, GPMC_FCLK, which comes internally from the power, reset, and clock-management (PRCM) module and runs at the L3 interconnect frequency. Its source is the PRCM module, CORE_L3_ICLK output. CORE_L3_ICLK belongs to the L3 interconnect clock domain.

      Have you enable configured this?

      Regards

      Jethin

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    • terpaccount
      Posted by terpaccount
      on Apr 28 2012 11:24 AM
      Prodigy60 points

      Hi There,

      Thanks for the reply!

      Well, that is exactly my problem.  When I try to memory map that register space, my MMAP call fails...  So when I try to enable that clock, I can't.

      Seems I must recompile the project like this person: https://groups.google.com/forum/?fromgroups#!topic/beagleboard/cFgfEEYp19k

      But that is a big hassle.  Any other options?

      Actually, this does work.  The problem I was having was that the clock was off in my OS and kernel source.  Moving to the latest ubunutu-precise & kernel 3.2 was a huge step in the right direction.

      Thanks You

      omap gpmc register access
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