How to flash C5515 EVM with SDRAM support

Cong Van Nguyen

Hi everyone,

I wrote a simple program for C5515 EVM board to test SDRAM support. The program simply displays (on the LCD) an 128x128 image located in SDRAM.

The program worked fine when I ran it directly from CCS using "Debug Launch" button.

Then, I tried to flash the program onto NOR flash. As the image data would be loaded to SDRAM by the boot loader, I had to ask it to configure EMIF first via hex55 options as follow (register values are copied from GEL file):

-boot -v5515 -b -serial8 -reg_config 0x1c04,0x0020 -reg_config 0x1C05,0x0002 -delay 0x100 -reg_config 0x1c1e,0x0001 -reg_config 0x1c33,0x0000 -reg_config 0x1020,0x4710 -reg_config 0x1021,0x3911 -reg_config 0x103C,0x0007 -reg_config 0x100C,0x04E3 -reg_config 0x1008,0x4720 -reg_config 0x1009,0x0001 -delay 0x100 -reg_config 0x100C,0x061A

After I flashed the program onto NOR flash and restarted the EVM board, it behaved wrongly: the board still booted from the previous binary but not the new program flashed.

Then, I tried to replaced the hex55 option -v5515 by -v5505 and flashed the program again. This time, the board did boot from the new binary, but nothing was displayed on the LCD as expected. The DSP seemed to stall before the boot loader returns control.

Is there an example to flash C5515 EVM with SDRAM support somewhere?

BTW, my program does have SDRAM initialization code (thus it works properly without GEL file when loaded directly in CCS).

Kind regards,

Cong-Van

over 14 years ago

0 Steve Tsang over 14 years ago

TI__Mastermind 23785 points

Check out this link and there is a cleaner.bin file there . Use it to clean and program again.

http://processors.wiki.ti.com/index.php/C5515_Boot-Image_Programmer

Regards.

0 Cong Van Nguyen over 14 years ago in reply to Steve Tsang

Intellectual 970 points

Hi Steve,

I've tried clean reprogram NOR Flash many times, but still get the same.

Using the debugger, I found that the DSP stalled in an infinite loop at the address range 0xFFA669-0xFFA67A, which is apparently the boot loader.

Any way, is it possible at all for the C5515 boot loader to access external SDRAM?

Thanks,

Cong-Van

0 Cong Van Nguyen over 14 years ago in reply to Cong Van Nguyen

Intellectual 970 points

Update:

I realized that resetting EMIF (by configuring -reg_config 0x1c04,0x0020 -reg_config 0x1C05,0x0002 -delay 0x100) stalled the bootloader (doing that would loose the NOR Flash initialization which had been done before that reset). I also change SDRAM timing configurations to adapt SYSCLK = 12.288 MHz during boot loading (SDRAM timing configurations used in the GEL file is for SYSCLK = 100MHz). Then I got the following setup for hex55:

-boot -v5505 -b -serial8 -reg_config 0x1c1e,0x0001 -reg_config 0x1c33,0x0000 -reg_config 0x1020,0x0000 -reg_config 0x1021,0x0001 -reg_config 0x103C,0x0000 -reg_config 0x100C,0x009B -reg_config 0x1008,0x4720 -reg_config 0x1009,0x0001 -delay 2458 -reg_config 0x100C,0x00C0 -delay 2458

Unfortunately, the boot loader still fails to load data sections into SDRAM.

0 OlegSterlegov over 13 years ago in reply to Cong Van Nguyen

Prodigy 230 points

I have exactly the same problem.

When I place .bss section in external SDRAM, bootloader don't loading my application. When all sections are in internal RAM, application loading succesfully.

0 Cong Van Nguyen over 13 years ago in reply to OlegSterlegov

Intellectual 970 points

In the meantime, I just workaround the issue by using a tandem bootloader. When the DSP boots up, its bootloader just loads a program small enough to fit the on-chip memory. This program, called tandem bootloader, then loads the second boot image, which contains the desired program. Since the tandem bootloader is also my own code (run from RAM), I can initialize EMIF (and whatever else) appropriately.

I do believe that the DSP bootloader can load boot image sections to external SDRAM. However, doing that seems to require magic hex55 options that I cannot figure out. I would appreciate any help on this issue.

Cong-Van

0 OlegSterlegov over 13 years ago in reply to Cong Van Nguyen

Prodigy 230 points

Yes, second-level bootloader will solve this problem completely. And I'll do so, but later.

I can not find truely information about embedded bootloader and sdram.

But in my case, I see, what library initialization function do some work with SDRAM (.bss section, while it's strange) before calling user init function in dsp/bios.

So, one of the way may be to write own init function in assembly, put it to SARAM and set linker entry point on it.

And after this I'll check, does embedded bootloader load SDRAM from flash or not.

0 Cong Van Nguyen over 13 years ago in reply to OlegSterlegov

Intellectual 970 points

Hi Oleg,

For all C compilers I have seen so far, the standard library initializes global/static variables in .bss before returning control to main(). Hope you can solve the issue.

Cheers,

Cong-Van

0 Cong Van Nguyen over 13 years ago in reply to Cong Van Nguyen

Intellectual 970 points

Yuppi, I've solved the issue finally.

Previously I declared the image data as follow:

#pragma DATA_SECTION(image_data, ".sdram_const")

Uint16 image_data[16384] = {blah blah blah};

This code declared the array as a global variable with initialization values. Thus, the bootloader loaded image data from the flash to .cinit section but not to image_data array directly. After the bootloader returned control, LIBC initialization code would load these data from .cinit section to image_data. The bootloader seems to reset EMIF before returning control, thus LIBC inialization has no way to access SDRAM as well as other external memories appropriately!

Thus, I have to declare the image data as a constant object:

#pragma DATA_SECTION(image_data, ".sdram_const")

const Uint16 image_data[16384] = {blah blah blah};

This time, the bootloader load image data from the flash to image_data directly, and the boot image works flawlessly. Definitely, I need to configure SDRAM registers in hex55 options in order to let the bootloader access SDRAM:

In conclusion, it is not allowed for the LIBC initialization to access any off-chip code/data!

P/S: I'd like to thank you, Oleg, for the problem you raised that motivated me to realize the main reason.

Dear TI errata coordinators, this issue of C5515 bootloader disabling EMIF would be worth one more part of the errata document.

0 OlegSterlegov over 13 years ago in reply to Cong Van Nguyen

Prodigy 230 points

So, I wrote a little bit of code in assembler and got the next solution.

1. Add to the project .asm-file with next content:

<pre>

    .mmregs

    .ref _c_int00

ESCR    .set    0x1c33
SDTIMR1 .set    0x1020
SDTIMR2 .set    0x1021
SDCR1   .set    0x1008
SDCR2   .set    0x1009
SDSRETR .set    0x103C
SDRCR   .set    0x100C
PRCR    .set    0x1C05
PCGCR1 .set    0x1c02
PCGCR2 .set    0x1c03
PSRCR   .set    0x1c04
CLKCFGL .set    0x1c1e
CCR2    .set    0x1c1f
CGCR1   .set    0x1c20
CGCR2   .set    0x1c21
CGCR3   .set    0x1c22
CGCR4   .set    0x1c23
CCSSR   .set    0x1c24
IVPD    .set    0x0049

    .def    _c5515_init
    .sect   "c5515_init_sect"

_c5515_init:
    .if 1
    bit(ST1, #11) = #1      ; Disable interrupts
    bit(ST3,#7) = #0        ; Clear bus error interrupts
    bit(ST3,#2) = #1        ; shut off clockout port
    bit(ST1,#13) = #0       ; shut off XF port
    .endif

    ; peripheral reset
    .if 1
    *port(#PSRCR) = 0x0020 ; set peripheral reset count
    *port(#PRCR) = 0x00BF   ; reset peripherals, EMIF too
    repeat(#0x0100)
    nop
    .endif

    ; config pll to 100 MHz
    .if 1
    ; Enable clocks to peripherals
    *port(#PCGCR1) = 0x0000
    *port(#PCGCR2) = 0x0000
    ; Bypass PLL
    *port(#CCR2) = 0x0000
    ; Set CLR_CNTL = 0
    *port(#CGCR1) = 0x8BE8
    *port(#CGCR2) = 0x8000
    *port(#CGCR3) = 0x0806
    *port(#CGCR4) = 0x0000
    ; Wait for PLL lock
    repeat(#0x1000)
    nop
    ; Switch to PLL clk
    *port(#CCR2) = 0x0001
    .endif

    ; init SDRAM
    .if 1
    ; reset EMIF
    *port(#PRCR) = 0x0002
    repeat(#0x100)
    nop
    ; enable SDRAM clock
    *port(CLKCFGL) = 0x0001
    ; enable word writes to EMIF regs
    *port(#ESCR) = 0x0000
    ; step 1
    *port(#SDTIMR1) = 0x4710
    *port(#SDTIMR2) = 0x3911
    *port(#SDSRETR) = 0x0007
    ; step 2
    *port(#SDRCR) = 0x04E3
    ; step 3
    *port(#SDCR1) = 0x4720
    *port(#SDCR2) = 0x0001
    ; step 4
    repeat(#0x100)
    nop
    ; step 5
    *port(#SDRCR) = 0x061A
    .endif

    goto _c_int00

    .end

</pre>

It's just the same that makes *.gel file for EVM5515.

2. Set in linker options entry point to _c5515_init.

3. Set in cmd file linker section"c5515_init_sect" to SARAM.

4. For generation of binary file for flash I used configuration registers for hex55 from previous message by Cong Van Nguyen.

Now we can place to SDRAM all kinds of sections :)

0 Cong Van Nguyen over 13 years ago in reply to OlegSterlegov

Intellectual 970 points

Great work, Oleg. It reminds me how the computer viruses work in the old days :-)

Just a small additional thing: when CSL is used, the soft reset routine should finally jump to the above _c5515_init rather than _c_int00.

This technique can be used also for those who do not have SDRAM but allocate constant data and code on NOR flash!

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How to flash C5515 EVM with SDRAM support