Questions on C67x DSP FastRTS library

Eugene,

There are test examples that come with some releases of FastRTS or of the sinsp_i function. Have you tried one of those.

Which DSP are you using? Are you running on the EVM or simulator?

Which version of CCS and the Code Generation Tools are you using?

It is not obvious from your post whether you are pipelining the sinsp_i call 128 times in a tight loop. If you use it differently, you will get different results.

Regards,
RandyP

Hi, Randyp,

   Thank you for your reply. 

   I could not find where the test examples within the directory of FastRTS. Could you please pass it to me? Or could you paste the example for sinsp_i here?

   I am using C6747 DSP, running on customized PCB board. The CCS version is 4.2.4.. The code generation tool is C6000, version 7.0.3. 

  I do the pipelining sinsp_i call within a while loop, shown below. May I know what's the meaning of tight loop? What's the correct way to do pipelining sinsp_i call? Thank you so much.

while (1)

{

   if (enable)

{

   sin_1 = sinsp_i(value_1);

   sin_1 *= parameter_1; 

   cos_1 = cossp_i(value_1);

   cos_1 *= parameter_1; 

   sin_2 = sinsp_i(value_2);

   sin_2 *= parameter_2; 

   cos_2 = cossp_i(value_2);

   cos_2 *= parameter_2; 

   sin_3 = sinsp_i(value_3);

   sin_3 *= parameter_3; 

   cos_3 = cossp_i(value_3);

   cos_3 *= parameter_3; 

   sin_4 = sinsp_i(value_4);

   sin_4 *= parameter_4; 

   cos_4 = cossp_i(value_4);

   cos_4 *= parameter_4; 

   //// and a lot of other codes below

  ..................

  ..................

}

else

{

   //// a lot of other codes below

  ..................

  ..................

}

}

Eugene,

The reference files I have are from the MathLib for C66x, but this code for a vector function may be generic:

  for (i = 0; i < BUF_SIZE; i++) {
    output[i] = sinsp_i(input[i]);
  }

That is a tight loop. Nothing is running but this function call. This might get you to the benchmark numbers, but I do not have the benchmark tests and measurements.

The point is that the result is simply stored to memory and not acted upon. If the code has to wait for the result of one sinsp_i call before starting to execute the next sinsp_i call, then they will not be pipelined.

Regards,
RandyP

Hi, Randyp,

  Thank you for your reply.

  I have tried the method your suggested, to use a tight for loop to calculate sinsp_i. I tried 4x loops and 16x loops. However, the results are the same. The processing time of sinsp_i is about 50% more than sinsp, for the for 4x and 16x loops. It seems the pipeline does not function.

  Do we need to configure something for pipelining function in CCS, to tell the DSP we are going to use pipelining here? Otherwise, how the DSP compiler knows whether to use pipelining or not?

  By the way, I am using DSP non-bios. 

  Thank you so much.

Eugene,

Please search the TI Wiki Pages for "c6000 optimization" (no quotes) and find some useful articles on code optimization techniques. There is a C6000 Optimization Workshop that should be in that list. This workshop is an archive of a class we have taught for many years. The student guide and labs (with solutions) can be very helpful for learning optimization techniques.

Regards,
RandyP

Hi, Randyp,

  Thank you for your help.

Best Rgds,