Flash Burn LCDK6748 NAND Writer

Ilich,

Instead of removing the debugger, just remove the GEL script from the DSP core in the configuration. Then you can do a reset through CCS and step through the code to see if it is loaded correctly.

Regards,
RandyP

Hi Ilich,

Have you tried running the gpioLed.out example by loading it over emulator before creating the boot image. Did it work? Ensure the image you are using is created for the LCDK and not for the EVM as there are hardware differences.

If it worked over an emulator, second thing to check is the pinmux settings used in the AISgen tool. If the code works over the emulator with a GEL file, ensure that you have copied the pinmux setting from the GEL file into your AIS tool correctly so that the correct GPIO pins are enabled.

One other minor thing to confirm is that after you write to the NAND flash ensure that you change the boot pins to NAND flash boot mode before powering on the DSP. If this doesn`t work we would want you to run the debug GEL file after the boot fails and provide us a dump. The debug GEL file can be obtained here:

http://processors.wiki.ti.com/index.php/OMAP-L1x_Debug_Gel_Files

Regards,

Rahul

Hi Rahul

Regarding on the NAND Flash burn process for the LCDKC6748 let me describe my problem using the follow log. First let me describe my tools:

1. CCS v 5.3.0.00090.
2. LCDKC6748 TI-DSP (included a NAND-16bit).
3. AISgen_d800k008.
4. XDS100v2 14 Pin JTAG Emulator.
5. Starter Ware 1.20.03.03.

I collected information from:

1. “Student Guide C6000 Embedded Design Workshop Using BIOS”, specifically the “Booting From Flash” section.
2. From the e2e forum (specifically “How to burn a program into SPI flash memory on the c6748 EVM” with the follow link: http://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/115/t/112073.aspx?pi239031349=1)
3. And from the Wiki “LCDK User Guide” http://processors.wiki.ti.com/index.php/LCDK_User_Guide#NAND_Flashing

I debugged the example “gpio” (included in the Starter Ware) with CCS. The file generated was the “gpioLed.out” (Release configuration). The led blinks perfectly. And my intention is burn it into the flash.

Well, following the steps summarize my procedure in order to intend burn the flash:

I got the ROM ID (d800k008) using the OMAP-L138_LCDK.gel.

Then I generated the file gpioLed.bin from the gpioLed.out with the AISgen. The AISgen configuration file is the follow:

Boot Mode=NAND Flash

Boot Speed=0

Flash Width=1

Flash Timing=3ffffffd

Configure Peripheral=False

Configure PLL0=True

Configure SDRAM=False

Configure PLL1=True

Configure DDR2=True

Configure LPSC=True

Configure Pinmux=False

Enable CRC=False

Specify Entrypoint=False

Enable Sequential Read=False

Use 4.5 Clock Divider=False

Use DDR2 Direct Clock=False

Use mDDR=True

ROM ID=3

Device Type=1

Input Clock Speed=24

Clock Type=0

PLL0 Pre Divider=1

PLL0 Multiplier=25

PLL0 Post Divider=2

PLL0 Div1=1

PLL0 Div3=3

PLL0 Div7=6

PLL1 Multiplier=25

PLL1 Post Divider=2

PLL1 Div1=1

PLL1 Div2=2

PLL1 Div3=3

Entrypoint=0

SDRAM SDBCR=0

SDRAM SDTMR=0

SDRAM SDRSRPDEXIT=0

SDRAM SDRCR=0

DDR2 PHY=c4

DDR2 SDCR=2034622

DDR2 SDCR2=0

DDR2 SDTIMR=20923249

DDR2 SDTIMR2=3e141420

DDR2 SDRCR=493

LPSC0 Enable=0+1+2+3+4+5+9+10+11+12+13+

LPSC0 Disable=

LPSC0 SyncRst=

LPSC1 Enable=0+1+2+3+4+5+6+7+9+10+11+12+13+14+15+16+17+18+19+20+21+24+25+26+27+28+29+30+31+

LPSC1 Disable=

LPSC1 SyncRst=

Pinmux=

App File String=C:\ti\C6748_StarterWare_1_20_03_03\build\c674x\cgt_ccs\c6748\lcdkC6748\gpio\Release\gpioLed.out

AIS File Name=C:\temp\gpioLED.bin

 

Then I imported (from CCS) the project NANDWriter_DSP (I changed  #define "NANDWIDTH_8" to "#define NANDWIDTH_16" in nandwriter.c), then I built the project (it generated the new NANDWriter_DSP.out). I debugged the project and started the burn process. The results the debug session were the follow:

[C674X_0] Starting OMAP-L138 NANDWriter.

Do you want to global erase NAND flash?y

Enter the binary AIS file name to flash (enter 'none' to skip) :

c:\temp\gpioLed.bin

Number of blocks needed for data: 0x1

Writing image data to block 0x0, page 0x0

Writing image data to block 0x0, page 0x1

Writing image data to block 0x0, page 0x2

 

NAND boot preparation was successful!

 

Immediately a strange message appears

”Can't find a source file at "/tmp/TI_MKLIB2hl0Ay/SRC/exit.c

Locate the file or edit the source lookup path to include its location”

But I didn’t pay attention on that, so I terminate the debug session and close de CCS. Unplug the power supply and the XDS100v2 from my board. I Turned the SW1 to boot from the NAND Flash 16 bits (SW[1:4]=0111) then I plug again the power supply but nothing happened.

As nothing happened, again I opened the NANDWriter project for debug it. I added the OMAP-L138_LCDK.gel and I ran “Scripts->Diagnosis-Run_All” and the console results were:

 

---------------------------------------------

C674X_0: GEL Output: |             Device Information            |

C674X_0: GEL Output: ---------------------------------------------

C674X_0: GEL Output: DEV_INFO_00 = 0x1B7D102F

C674X_0: GEL Output: DEV_INFO_01 = 0x00000000

C674X_0: GEL Output: DEV_INFO_02 = 0x00000010

C674X_0: GEL Output: DEV_INFO_03 = 0x00000003

C674X_0: GEL Output: DEV_INFO_04 = 0x00000000

C674X_0: GEL Output: DEV_INFO_05 = 0x000003E0

C674X_0: GEL Output: DEV_INFO_06 = 0x00000080

C674X_0: GEL Output: DEV_INFO_07-DEV_INFO_08-DEV_INFO_09-DEV_INFO_10-DEV_INFO_11-DEV_INFO_12 = 0-0-5303387-2-53-13

C674X_0: GEL Output: DEV_INFO_13,DEV_INFO_14,DEV_INFO_15,DEV_INFO_16 = 3,0,0,6114

C674X_0: GEL Output: -----

C674X_0: GEL Output: DEV_INFO_17 = 0x00030003

C674X_0: GEL Output: DEV_INFO_18 = 0x00000000

C674X_0: GEL Output: DEV_INFO_19 =C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output:

C674X_0: GEL Output: -----

C674X_0: GEL Output: DEV_INFO_20 = 0x30303864

C674X_0: GEL Output: DEV_INFO_21 = 0x3830306B

C674X_0: GEL Output: DEV_INFO_22 = 0x00000000

C674X_0: GEL Output: DEV_INFO_23 = 0x00000000

C674X_0: GEL Output: -----

C674X_0: GEL Output: DEV_INFO_24 = 0x0200D035

C674X_0: GEL Output: DEV_INFO_25 = 0x0050EC5B

C674X_0: GEL Output: DEV_INFO_06 = 0x00000080

C674X_0: GEL Output: DEV_INFO_26 = 0x2FC40003

C674X_0: GEL Output:

 

C674X_0: GEL Output: ---------------------------------------------

C674X_0: GEL Output: |               BOOTROM Info                |

C674X_0: GEL Output: ---------------------------------------------

C674X_0: GEL Output: ROM ID: d800k008

C674X_0: GEL Output: Silicon Revision UNKNOWN

C674X_0: GEL Output: Boot Mode: NAND 16

C674X_0: GEL Output:

ROM Status Code: 0x00000005

Description:C674X_0: GEL Output: Peripheral Open Failed

C674X_0: GEL Output:

Program Counter (PC) = 0x800041E0

C674X_0: GEL Output:

C674X_0: GEL Output: ---------------------------------------------

C674X_0: GEL Output: |              Clock Information             |

C674X_0: GEL Output: ---------------------------------------------

C674X_0: GEL Output:

C674X_0: GEL Output: PLLs configured to utilize crystal.

C674X_0: GEL Output: ASYNC3 = PLL0_SYSCLK2

C674X_0: GEL Output:

C674X_0: GEL Output: NOTE:  All clock frequencies in following PLL sections are based

C674X_0: GEL Output: off OSCIN = 24 MHz.  If that value does not match your hardware

C674X_0: GEL Output: you should change the #define in the top of the gel file, save it,

C674X_0: GEL Output: and then reload.

C674X_0: GEL Output:

C674X_0: GEL Output: ---------------------------------------------

C674X_0: GEL Output: |              PLL0 Information             |

C674X_0: GEL Output: ---------------------------------------------

C674X_0: GEL Output:

C674X_0: GEL Output: PLL0_SYSCLK1 = 300 MHz

C674X_0: GEL Output: PLL0_SYSCLK2 = 150 MHz

C674X_0: GEL Output: PLL0_SYSCLK3 = 25 MHz

C674X_0: GEL Output: PLL0_SYSCLK4 = 75 MHz

C674X_0: GEL Output: PLL0_SYSCLK5 = 300 MHz

C674X_0: GEL Output: PLL0_SYSCLK6 = 300 MHz

C674X_0: GEL Output: PLL0_SYSCLK7 = 50 MHz

C674X_0: GEL Output:

C674X_0: GEL Output: ---------------------------------------------

C674X_0: GEL Output: |              PLL1 Information             |

C674X_0: GEL Output: ---------------------------------------------

C674X_0: GEL Output:

C674X_0: GEL Output: PLL1_SYSCLK1 = 300 MHz

C674X_0: GEL Output: PLL1_SYSCLK2 = 150 MHz

C674X_0: GEL Output: PLL1_SYSCLK3 = 300 MHz

C674X_0: GEL Output:

C674X_0: GEL Output: ---------------------------------------------

C674X_0: GEL Output: |              PSC0 Information             |

C674X_0: GEL Output: ---------------------------------------------

C674X_0: GEL Output:

C674X_0: GEL Output: State Decoder:

C674X_0: GEL Output:  0 = SwRstDisable (reset asserted, clock off)

C674X_0: GEL Output:  1 = SyncReset (reset assered, clock on)

C674X_0: GEL Output:  2 = Disable (reset de-asserted, clock off)

C674X_0: GEL Output:  3 = Enable (reset de-asserted, clock on)

C674X_0: GEL Output: >3 = Transition in progress

C674X_0: GEL Output:

C674X_0: GEL Output: Module 0: EDMA3CC (0)        STATE = 3

C674X_0: GEL Output: Module 1: EDMA3 TC0          STATE = 3

C674X_0: GEL Output: Module 2: EDMA3 TC1          STATE = 3

C674X_0: GEL Output: Module 3: EMIFA (BR7)        STATE = 3

C674X_0: GEL Output: Module 4: SPI 0              STATE = 3

C674X_0: GEL Output: Module 5: MMC/SD 0           STATE = 3

C674X_0: GEL Output: Module 6: AINTC              STATE = 0

C674X_0: GEL Output: Module 7: ARM RAM/ROM        STATE = 3

C674X_0: GEL Output: Module 9: UART 0             STATE = 3

C674X_0: GEL Output: Module 10: SCR 0 (BR0/1/2/8)  STATE = 3

C674X_0: GEL Output: Module 11: SCR 1 (BR4)        STATE = 3

C674X_0: GEL Output: Module 12: SCR 2 (BR3/5/6)    STATE = 3

C674X_0: GEL Output: Module 13: PRUSS              STATE = 0

C674X_0: GEL Output: Module 14: ARM                STATE = 0

C674X_0: GEL Output: Module 15: DSP                STATE = 3

C674X_0: GEL Output:

C674X_0: GEL Output: ---------------------------------------------

C674X_0: GEL Output: |              PSC1 Information             |

C674X_0: GEL Output: ---------------------------------------------

C674X_0: GEL Output:

C674X_0: GEL Output: State Decoder:

C674X_0: GEL Output:  0 = SwRstDisable (reset asserted, clock off)

C674X_0: GEL Output:  1 = SyncReset (reset assered, clock on)

C674X_0: GEL Output:  2 = Disable (reset de-asserted, clock off)

C674X_0: GEL Output:  3 = Enable (reset de-asserted, clock on)

C674X_0: GEL Output: >3 = Transition in progress

C674X_0: GEL Output:

C674X_0: GEL Output: Module 0: EDMA3CC (1)        STATE = 3

C674X_0: GEL Output: Module 1: USB0 (2.0)         STATE = 3

C674X_0: GEL Output: Module 2: USB1 (1.1)         STATE = 3

C674X_0: GEL Output: Module 3: GPIO               STATE = 3

C674X_0: GEL Output: Module 4: UHPI               STATE = 3

C674X_0: GEL Output: Module 5: EMAC               STATE = 3

C674X_0: GEL Output: Module 6: DDR2 and SCR F3    STATE = 3

C674X_0: GEL Output: Module 7: MCASP0 + FIFO      STATE = 3

C674X_0: GEL Output: Module 8: SATA               STATE = 3

C674X_0: GEL Output: Module 9: VPIF               STATE = 3

C674X_0: GEL Output: Module 10: SPI 1              STATE = 3

C674X_0: GEL Output: Module 11: I2C 1              STATE = 3

C674X_0: GEL Output: Module 12: UART 1             STATE = 3

C674X_0: GEL Output: Module 13: UART 2             STATE = 3

C674X_0: GEL Output: Module 14: MCBSP0 + FIFO      STATE = 3

C674X_0: GEL Output: Module 15: MCBSP1 + FIFO      STATE = 3

C674X_0: GEL Output: Module 16: LCDC               STATE = 3

C674X_0: GEL Output: Module 17: eHRPWM (all)       STATE = 3

C674X_0: GEL Output: Module 18: MMC/SD 1           STATE = 3

C674X_0: GEL Output: Module 19: UPP                STATE = 3

C674X_0: GEL Output: Module 20: eCAP (all)         STATE = 3

C674X_0: GEL Output: Module 21: EDMA3 TC2          STATE = 3

C674X_0: GEL Output: Module 24: SCR-F0 Br-F0       STATE = 3

C674X_0: GEL Output: Module 25: SCR-F1 Br-F1       STATE = 3

C674X_0: GEL Output: Module 26: SCR-F2 Br-F2       STATE = 3

C674X_0: GEL Output: Module 27: SCR-F6 Br-F3       STATE = 3

C674X_0: GEL Output: Module 28: SCR-F7 Br-F4       STATE = 3

C674X_0: GEL Output: Module 29: SCR-F8 Br-F5       STATE = 3

C674X_0: GEL Output: Module 30: Br-F7 (DDR Contr)  STATE = 3

C674X_0: GEL Output: Module 31: L3 RAM, SCR-F4, Br-F6 STATE = 3

 

Please help me to solve my problem as soon as possible.

 

 

 

 

 

 

 

Hi Rahul

Maybe the solution is in the AISgen configuration. Do you have to correct configuration AISgen file for the 16 bit-NAND/LCDKC6748? This is going to help me very much.

By the way, did you check my last post?

Thanks in advance.

Rahul,

You are a real rock star. Thanks a lot.

Maybe this could be useful in the future. I used the shf_OMAP_L138 method because the method using the project NAND_Writer_DSP didn’t work, well, at least not for me ;-)

Did I say that you are a rock star?