How do I change I2C clock rate on DM6467 EVM (git)

Hi,

In kernel you can set it from board specific file (arch/arm/mach-davinci/board-dm646x.c). Check I2C registration in this file.

static struct davinci_i2c_platform_data i2c_pdata = {
        .bus_freq       = 100 /* kHz */,
        .bus_delay      = 0 /* usec */,
};

Regards,

Krunal

Thanks.  With your advice I now find that line!  I didn't "read" every line, but searched for "clk" or "clock" or "rate", as well as dug through git.

(1) What is bus_delay?  I may need to add a delay from I2C "START" signal to first data clock.  Will this do that, or is it something else?

(2) Nevertheless, I'm confused.  The scope says 81kbps.  Hmmm...  Is this a 33MHz vs 27MHz thing?  Yep.  100*27/33 = 81.8MHz.  That's the reason my I2C bus is not running at 100kHz.  Please help me with this.  I couldn't get TMS320DM6467TZUT1 chips so I'm using TMS320DM6467ZUT7.  I've changed the crystal from 33MHz to 27MHz to suit, as well as the 1.2V power supply actual level.  So, is there some other place in board-dm646x-evm.c that I should change a 33 to a 27 to reflect my true crystal freq (I can't find it), or should I just compensate and change the I2c bus_freq to 122 (which will then actually be 122*27/33 = 99.8MHz.

Thanks VERY much,

Helmut

Hi,

1. bus_delay is the delay (usec) introduced before making any I2C transaction.

2. You can set any standard frequency, I have used with 100Khz and 400Khz, not sure what will be impact of setting it 122Khz but worth trying. I read somewhere it should be in range of 400Khz

Regards,

Krunal

2. I'm sorry, but I did not make myself clear.  If I want 100kHz out, I have to specify 122.  That's because the software erroneously thinks I have a 33MHz crystal.  I really only have a 27Mhz crystal.  Therefore, I would "lie" by saying 122, in order to get 100 out.  Rather than lie, is there some place where I can specify the actual crystal as being 27MHz rather than 33MHz?  A search of git/arch/arm/mach-davinci for "33" doesn't reveal anything.

1. Where is this bus_delay, between what and what?  Is it between the START and the data, or between something before the START?

Thanks again, very much.

-Helmut

All the clocks are defined in dm646x.c. They are defined in a hierarchical fashion with ref_clk as the root. The ref_clk is setup with call to dm646x_board_setup_refclk(&ref_clk) in board-dm646x-evm.c. Changing it here should change all the clocks derived from ref_clk.

#define DM646X_EVM_REF_FREQ             27000000
#define DM6467T_EVM_REF_FREQ            33000000
void __init dm646x_board_setup_refclk(struct clk *clk)
{
  if (machine_is_davinci_dm6467tevm())
    clk->rate = DM6467T_EVM_REF_FREQ;
  else
    clk->rate = DM646X_EVM_REF_FREQ;
}

I am surprised you have gotten this far without changing the ref_clk. UARTS would have the wrong baud rate.

Thanks.  The reason I couldn't find 33 in dm646x.c, and I did look, is because my version of git has pulled that out and put it into davinci_dm646x_1ghz_defconfig.  But since you clued me in to what to look for, I could now find it.

Regarding the UART, you would think so...  but NO!  I was worried about that little bit from the beginning, but it didn't happen.  My UART has always performed correctly, producing the 115,200 baud I expected, without changing this 33000000 to 27000000 and without changing anything else.  I have no clue why.  And now, speaking of this, if I go change that I should break my UART speed.

And further complicating, doesn't UBL or U-Boot also if not solely set the baud rate?  Those work at 115,200 on my 27MHz crystal.  I'm using dm6467t_495_ubl.bin and u-boot-dm6467t-evm.bin, which from their names you would think expected a 33MHz crystal.

I believe it was at the point above that I decided, "Hey, it's working.  Leave well enough alone."  So, I guess, in the same vein, I'll just change 100 to 122 and get a 100Hz I2C clock!  Nevertheless, thanks for helping me to the bottom of this item, and closer to the bottom of it all.

-Helmut