Recently I test the mcbsp_test.c found there is something wrong,I am amazing because the source code is from ti without any change.
Sourcr code path: ti-dvsdk_omapl138-evm_4_01_00_09\psp\linux-driver-examples-psp03.20.00.13\mcbsp\mcbsp_test.c
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davinci-mcbsp davinci-mcbsp.1: Clock rate is 150000000, Freq is 48000
davinci-mcbsp davinci-mcbsp.1: The divider value is 47(0x2f)
davinci-mcbsp davinci-mcbsp.1: value written to SRGR is 303f002f
davinci-mcbsp davinci-mcbsp.1: WFIFO value 00000001
davinci-mcbsp davinci-mcbsp.1: RFIFO value 00000001
davinci-mcbsp davinci-mcbsp.1: Max TX A:1, B:0
davinci-mcbsp davinci-mcbsp.1: Max RX A:1, B:0
Setting DLB mode
Transmitting Packet 65
Starting McBSP TX
davinci-mcbsp davinci-mcbsp.1: Configuring TX master mode
Starting McBSP RX
davinci-mcbsp davinci-mcbsp.1: Configuring RX in master mode
McBSP started
Receving data...
EDMA: EER0 00000000
davinci-mcbsp davinci-mcbsp.1: RX buffer interleaved format
EDMA: ER0 00000020
EDMA: EER0 00000010
davinci-mcbsp davinci-mcbsp.1: Triggering the receiver
davinci-mcbsp davinci-mcbsp.1: Configuring RX in master mode
Transmitting data...
EDMA: EER0 00000010
davinci-mcbsp davinci-mcbsp.1: TX interleaved buffer format
EDMA: ER0 00000000
EDMA: EER0 00000030
davinci-mcbsp davinci-mcbsp.1: Configuring TX in master mode
edma edma: dma_ccerr_handler
edma edma: EMR0 00000030
davinci-mcbsp davinci-mcbsp.1: RX DMA callback with status 2
davinci-mcbsp davinci-mcbsp.1: TX DMA callback with status 2
edma edma: dma_irq_handler
edma edma: IPR0 00000030
davinci-mcbsp davinci-mcbsp.1: RX DMA callback with status 1
EDMA: EER0 00000020
davinci-mcbsp davinci-mcbsp.1: TX DMA callback with status 1
EDMA: EER0 00000000
...TX complete
...RX complete
EDMA: EMR0 00000000
TX stopped
EDMA: EMR0 00000000
RX stopped
Testing data integrity for Packet 65:
bufdest[0]: 64 65 66 3 68 69 70 71 72 73
bufdest[10]: 74 75 76 77 78 79 80 81 82 83
bufdest[20]: 84 85 86 87 88 89 90 91 92 93
bufdest[30]: 94 95 96 97 98 99 100 101 102 103
bufdest[40]: 104 105 106 107 108 109 110 111 112 113
bufdest[50]: 114 115 116 117 118 119 120 121 122 123
bufdest[60]: 124 125 126 127 128 129 130 131 132 133
bufdest[70]: 134 135 136 137 138 139 140 141 142 143
bufdest[80]: 144 145 146 147 148 149 150 151 152 153
bufdest[90]: 154 155 156 157 158 159 160 161 162 163
bufdest[100]: 164 165 166 167 168 169 170 171 172 173
bufdest[110]: 174 175 176 177 178 179 180 181 182 183
bufdest[120]: 184 185 186 187 188 189 190 191 192 193
bufdest[130]: 194 195 196 197 198 199 200 201 202 203
bufdest[140]: 204 205 206 207 208 209 210 211 212 213
bufdest[150]: 214 215 216 217 218 219 220 221 222 223
bufdest[160]: 224 225 226 227 228 229 230 231 232 233
bufdest[170]: 234 235 236 237 238 239 240 241 242 243
bufdest[180]: 244 245 246 247 248 249 250 251 252 253
bufdest[190]: 254 255 0 1 2 3 4 5 6 7
bufdest[200]: 8 9 10 11 12 13 14 15 16 17
bufdest[210]: 18 19 20 21 22 23 24 25 26 27
bufdest[220]: 28 29 30 31 32 33 34 35 36 37
bufdest[230]: 38 39 40 41 42 43 44 45 46 47
bufdest[240]: 48 49 50 51 52 53 54 55 56 57
bufdest[250]: 58 59 60 61 62 63 64 65 66 67
bufdest[260]: 68 69 70 71 72 73 74 75 76 77
bufdest[270]: 78 79 80 81 82 83 84 85 86 87
bufdest[280]: 88 89 90 91 92 93 94 95 96 97
bufdest[290]: 98 99 100 101 102 103 104 105 106 107
bufdest[300]: 108 109 110 111 112 113 114 115 116 117
bufdest[310]: 118 119 120 121 122 123 124 125 126 127
bufdest[320]: 128 129 130 131 132 133 134 135 136 137
bufdest[330]: 138 139 140 141 142 143 144 145 146 147
bufdest[340]: 148 149 150 151 152 153 154 155 156 157
bufdest[350]: 158 159 160 161 162 163 164 165 166 167
bufdest[360]: 168 169 170 171 172 173 174 175 176 177
bufdest[370]: 178 179 180 181 182 183 184 185 186 187
bufdest[380]: 188 189 190 191 192 193 194 195 196 197
bufdest[390]: 198 199 200 201 202 203 204 205 206 207
bufdest[400]: 208 209 210 211 212 213 214 215 216 217
bufdest[410]: 218 219 220 221 222 223 224 225 226 227
bufdest[420]: 228 229 230 231 232 233 234 235 236 237
bufdest[430]: 238 239 240 241 242 243 244 245 246 247
bufdest[440]: 248 249 250 251 252 253 254 255 0 1
bufdest[450]: 2 3 4 5 6 7 8 9 10 11
bufdest[460]: 12 13 14 15 16 17 18 19 20 21
bufdest[470]: 22 23 24 25 26 27 28 29 30 31
bufdest[480]: 32 33 34 35 36 37 38 39 40 41
bufdest[490]: 42 43 44 45 46 47 48 49 50 51
bufdest[500]: 52 53 54 55 56 57 58 59 60 61
bufdest[510]: 62 63 64 65 66 67 68 69 70 71
bufdest[520]: 72 73 74 75 76 77 78 79 80 81
bufdest[530]: 82 83 84 85 86 87 88 89 90 91
bufdest[540]: 92 93 94 95 96 97 98 99 100 101
bufdest[550]: 102 103 104 105 106 107 108 109 110 111
bufdest[560]: 112 113 114 115 116 117 118 119 120 121
bufdest[570]: 122 123 124 125 126 127 128 129 130 131
bufdest[580]: 132 133 134 135 136 137 138 139 140 141
bufdest[590]: 142 143 144 145 146 147 148 149 150 151
bufdest[600]: 152 153 154 155 156 157 158 159 160 161
bufdest[610]: 162 163 164 165 166 167 168 169 170 171
bufdest[620]: 172 173 174 175 176 177 178 179 180 181
bufdest[630]: 182 183 184 185 186 187 188 189 190 191
bufdest[640]: 192 193 194 195 196 197 198 199 200 201
bufdest[650]: 202 203 204 205 206 207 208 209 210 211
bufdest[660]: 212 213 214 215 216 217 218 219 220 221
bufdest[670]: 222 223 224 225 226 227 228 229 230 231
bufdest[680]: 232 233 234 235 236 237 238 239 240 241
bufdest[690]: 242 243 244 245 246 247 248 249 250 251
bufdest[700]: 252 253 254 255 0 1 2 3 4 5
bufdest[710]: 6 7 8 9 10 11 12 13 14 15
bufdest[720]: 16 17 18 19 20 21 22 23 24 25
bufdest[730]: 26 27 28 29 30 31 32 33 34 35
bufdest[740]: 36 37 38 39 40 41 42 43 44 45
bufdest[750]: 46 47 48 49 50 51 52 53 54 55
bufdest[760]: 56 57 58 59 60 61 62 63 64 65
bufdest[770]: 66 67 68 69 70 71 72 73 74 75
bufdest[780]: 76 77 78 79 80 81 82 83 84 85
bufdest[790]: 86 87 88 89 90 91 92 93 94 95
bufdest[800]: 96 97 98 99 100 101 102 103 104 105
bufdest[810]: 106 107 108 109 110 111 112 113 114 115
bufdest[820]: 116 117 118 119 120 121 122 123 124 125
bufdest[830]: 126 127 128 129 130 131 132 133 134 135
bufdest[840]: 136 137 138 139 140 141 142 143 144 145
bufdest[850]: 146 147 148 149 150 151 152 153 154 155
bufdest[860]: 156 157 158 159 160 161 162 163 164 165
bufdest[870]: 166 167 168 169 170 171 172 173 174 175
bufdest[880]: 176 177 178 179 180 181 182 183 184 185
bufdest[890]: 186 187 188 189 190 191 192 193 194 195
bufdest[900]: 196 197 198 199 200 201 202 203 204 205
bufdest[910]: 206 207 208 209 210 211 212 213 214 215
bufdest[920]: 216 217 218 219 220 221 222 223 224 225
bufdest[930]: 226 227 228 229 230 231 232 233 234 235
bufdest[940]: 236 237 238 239 240 241 242 243 244 245
bufdest[950]: 246 247 248 249 250 251 252 253 254 255
bufdest[960]: 0 1 2 3 4 5 6 7 8 9
bufdest[970]: 10 11 12 13 14 15 16 17 18 19
bufdest[980]: 20 21 22 23 24 25 26 27 28 29
bufdest[990]: 30 31 32 33 34 35 36 37 38 39
bufdest[1000]: 40 41 42 43 44 45 46 47 48 49
bufdest[1010]: 50 51 52 53 54 55 56 57 58 59
bufdest[1020]: 60 61 62 63
Error found at Byte 4 location
davinci-mcbsp davinci-mcbsp.1: ------ McBSP1 regs -----
davinci-mcbsp davinci-mcbsp.1: DRR: 0x00000000
davinci-mcbsp davinci-mcbsp.1: DXR: 0x3f3e3d3c
davinci-mcbsp davinci-mcbsp.1: SPCR: 0x00008000
davinci-mcbsp davinci-mcbsp.1: RCR: 0x00a001a0
davinci-mcbsp davinci-mcbsp.1: XCR: 0x00a001a0
davinci-mcbsp davinci-mcbsp.1: SRGR: 0x303f002f
davinci-mcbsp davinci-mcbsp.1: MCR: 0x00000000
davinci-mcbsp davinci-mcbsp.1: RCER0: 0x55555555
davinci-mcbsp davinci-mcbsp.1: XCER0: 0x55555555
davinci-mcbsp davinci-mcbsp.1: PCR: 0x00000f00
davinci-mcbsp davinci-mcbsp.1: RCER1: 0x00000000
davinci-mcbsp davinci-mcbsp.1: XCER1: 0x00000000
davinci-mcbsp davinci-mcbsp.1: RCER2: 0x00000000
davinci-mcbsp davinci-mcbsp.1: XCER2: 0x00000000
davinci-mcbsp davinci-mcbsp.1: RCER3: 0x00000000
davinci-mcbsp davinci-mcbsp.1: XCER3: 0x00000000
davinci-mcbsp davinci-mcbsp.1: WFIFOCTL: 0x00000001
davinci-mcbsp davinci-mcbsp.1: WFIFOSTS: 0x00000000
davinci-mcbsp davinci-mcbsp.1: RFIFOCTL: 0x00000001
davinci-mcbsp davinci-mcbsp.1: RFIFOSTS: 0x00000000
davinci-mcbsp davinci-mcbsp.1: -------------------------
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davinci-mcbsp davinci-mcbsp.1: Clock rate is 150000000, Freq is 48000
davinci-mcbsp davinci-mcbsp.1: The divider value is 47(0x2f)
davinci-mcbsp davinci-mcbsp.1: value written to SRGR is 303f002f
davinci-mcbsp davinci-mcbsp.1: WFIFO value 00000001
davinci-mcbsp davinci-mcbsp.1: RFIFO value 00000001
davinci-mcbsp davinci-mcbsp.1: Max TX A:1, B:0
davinci-mcbsp davinci-mcbsp.1: Max RX A:1, B:0
Setting DLB mode
Transmitting Packet 62
Starting McBSP TX
davinci-mcbsp davinci-mcbsp.1: Configuring TX master mode
Starting McBSP RX
davinci-mcbsp davinci-mcbsp.1: Configuring RX in master mode
McBSP started
Receving data...
EDMA: EER0 00000000
davinci-mcbsp davinci-mcbsp.1: RX buffer interleaved format
EDMA: ER0 00000020
EDMA: EER0 00000010
davinci-mcbsp davinci-mcbsp.1: Triggering the receiver
davinci-mcbsp davinci-mcbsp.1: Configuring RX in master mode
Transmitting data...
EDMA: EER0 00000010
davinci-mcbsp davinci-mcbsp.1: TX interleaved buffer format
EDMA: ER0 00000000
EDMA: EER0 00000030
davinci-mcbsp davinci-mcbsp.1: Configuring TX in master mode
edma edma: dma_ccerr_handler
edma edma: EMR0 00000030
davinci-mcbsp davinci-mcbsp.1: RX DMA callback with status 2
davinci-mcbsp davinci-mcbsp.1: TX DMA callback with status 2
edma edma: dma_irq_handler
edma edma: IPR0 00000030
davinci-mcbsp davinci-mcbsp.1: RX DMA callback with status 1
EDMA: EER0 00000020
davinci-mcbsp davinci-mcbsp.1: TX DMA callback with status 1
EDMA: EER0 00000000
...TX complete
...RX complete
EDMA: EMR0 00000000
TX stopped
EDMA: EMR0 00000000
RX stopped
Testing data integrity for Packet 62:
bufdest[0]: 61 62 63 0 65 66 67 68 69 70
bufdest[10]: 71 72 73 74 75 76 77 78 79 80
bufdest[20]: 81 82 83 84 85 86 87 88 89 90
bufdest[30]: 91 92 93 94 95 96 97 98 99 100
bufdest[40]: 101 102 103 104 105 106 107 108 109 110
bufdest[50]: 111 112 113 114 115 116 117 118 119 120
bufdest[60]: 121 122 123 124 125 126 127 128 129 130
bufdest[70]: 131 132 133 134 135 136 137 138 139 140
bufdest[80]: 141 142 143 144 145 146 147 148 149 150
bufdest[90]: 151 152 153 154 155 156 157 158 159 160
bufdest[100]: 161 162 163 164 165 166 167 168 169 170
bufdest[110]: 171 172 173 174 175 176 177 178 179 180
bufdest[120]: 181 182 183 184 185 186 187 188 189 190
bufdest[130]: 191 192 193 194 195 196 197 198 199 200
bufdest[140]: 201 202 203 204 205 206 207 208 209 210
bufdest[150]: 211 212 213 214 215 216 217 218 219 220
bufdest[160]: 221 222 223 224 225 226 227 228 229 230
bufdest[170]: 231 232 233 234 235 236 237 238 239 240
bufdest[180]: 241 242 243 244 245 246 247 248 249 250
bufdest[190]: 251 252 253 254 255 0 1 2 3 4
bufdest[200]: 5 6 7 8 9 10 11 12 13 14
bufdest[210]: 15 16 17 18 19 20 21 22 23 24
bufdest[220]: 25 26 27 28 29 30 31 32 33 34
bufdest[230]: 35 36 37 38 39 40 41 42 43 44
bufdest[240]: 45 46 47 48 49 50 51 52 53 54
bufdest[250]: 55 56 57 58 59 60 61 62 63 64
bufdest[260]: 65 66 67 68 69 70 71 72 73 74
bufdest[270]: 75 76 77 78 79 80 81 82 83 84
bufdest[280]: 85 86 87 88 89 90 91 92 93 94
bufdest[290]: 95 96 97 98 99 100 101 102 103 104
bufdest[300]: 105 106 107 108 109 110 111 112 113 114
bufdest[310]: 115 116 117 118 119 120 121 122 123 124
bufdest[320]: 125 126 127 128 129 130 131 132 133 134
bufdest[330]: 135 136 137 138 139 140 141 142 143 144
bufdest[340]: 145 146 147 148 149 150 151 152 153 154
bufdest[350]: 155 156 157 158 159 160 161 162 163 164
bufdest[360]: 165 166 167 168 169 170 171 172 173 174
bufdest[370]: 175 176 177 178 179 180 181 182 183 184
bufdest[380]: 185 186 187 188 189 190 191 192 193 194
bufdest[390]: 195 196 197 198 199 200 201 202 203 204
bufdest[400]: 205 206 207 208 209 210 211 212 213 214
bufdest[410]: 215 216 217 218 219 220 221 222 223 224
bufdest[420]: 225 226 227 228 229 230 231 232 233 234
bufdest[430]: 235 236 237 238 239 240 241 242 243 244
bufdest[440]: 245 246 247 248 249 250 251 252 253 254
bufdest[450]: 255 0 1 2 3 4 5 6 7 8
bufdest[460]: 9 10 11 12 13 14 15 16 17 18
bufdest[470]: 19 20 21 22 23 24 25 26 27 28
bufdest[480]: 29 30 31 32 33 34 35 36 37 38
bufdest[490]: 39 40 41 42 43 44 45 46 47 48
bufdest[500]: 49 50 51 52 53 54 55 56 57 58
bufdest[510]: 59 60 61 62 63 64 65 66 67 68
bufdest[520]: 69 70 71 72 73 74 75 76 77 78
bufdest[530]: 79 80 81 82 83 84 85 86 87 88
bufdest[540]: 89 90 91 92 93 94 95 96 97 98
bufdest[550]: 99 100 101 102 103 104 105 106 107 108
bufdest[560]: 109 110 111 112 113 114 115 116 117 118
bufdest[570]: 119 120 121 122 123 124 125 126 127 128
bufdest[580]: 129 130 131 132 133 134 135 136 137 138
bufdest[590]: 139 140 141 142 143 144 145 146 147 148
bufdest[600]: 149 150 151 152 153 154 155 156 157 158
bufdest[610]: 159 160 161 162 163 164 165 166 167 168
bufdest[620]: 169 170 171 172 173 174 175 176 177 178
bufdest[630]: 179 180 181 182 183 184 185 186 187 188
bufdest[640]: 189 190 191 192 193 194 195 196 197 198
bufdest[650]: 199 200 201 202 203 204 205 206 207 208
bufdest[660]: 209 210 211 212 213 214 215 216 217 218
bufdest[670]: 219 220 221 222 223 224 225 226 227 228
bufdest[680]: 229 230 231 232 233 234 235 236 237 238
bufdest[690]: 239 240 241 242 243 244 245 246 247 248
bufdest[700]: 249 250 251 252 253 254 255 0 1 2
bufdest[710]: 3 4 5 6 7 8 9 10 11 12
bufdest[720]: 13 14 15 16 17 18 19 20 21 22
bufdest[730]: 23 24 25 26 27 28 29 30 31 32
bufdest[740]: 33 34 35 36 37 38 39 40 41 42
bufdest[750]: 43 44 45 46 47 48 49 50 51 52
bufdest[760]: 53 54 55 56 57 58 59 60 61 62
bufdest[770]: 63 64 65 66 67 68 69 70 71 72
bufdest[780]: 73 74 75 76 77 78 79 80 81 82
bufdest[790]: 83 84 85 86 87 88 89 90 91 92
bufdest[800]: 93 94 95 96 97 98 99 100 101 102
bufdest[810]: 103 104 105 106 107 108 109 110 111 112
bufdest[820]: 113 114 115 116 117 118 119 120 121 122
bufdest[830]: 123 124 125 126 127 128 129 130 131 132
bufdest[840]: 133 134 135 136 137 138 139 140 141 142
bufdest[850]: 143 144 145 146 147 148 149 150 151 152
bufdest[860]: 153 154 155 156 157 158 159 160 161 162
bufdest[870]: 163 164 165 166 167 168 169 170 171 172
bufdest[880]: 173 174 175 176 177 178 179 180 181 182
bufdest[890]: 183 184 185 186 187 188 189 190 191 192
bufdest[900]: 193 194 195 196 197 198 199 200 201 202
bufdest[910]: 203 204 205 206 207 208 209 210 211 212
bufdest[920]: 213 214 215 216 217 218 219 220 221 222
bufdest[930]: 223 224 225 226 227 228 229 230 231 232
bufdest[940]: 233 234 235 236 237 238 239 240 241 242
bufdest[950]: 243 244 245 246 247 248 249 250 251 252
bufdest[960]: 253 254 255 0 1 2 3 4 5 6
bufdest[970]: 7 8 9 10 11 12 13 14 15 16
bufdest[980]: 17 18 19 20 21 22 23 24 25 26
bufdest[990]: 27 28 29 30 31 32 33 34 35 36
bufdest[1000]: 37 38 39 40 41 42 43 44 45 46
bufdest[1010]: 47 48 49 50 51 52 53 54 55 56
bufdest[1020]: 57 58 59 60
Error found at Byte 4 location
davinci-mcbsp davinci-mcbsp.1: ------ McBSP1 regs -----
davinci-mcbsp davinci-mcbsp.1: DRR: 0x00000000
davinci-mcbsp davinci-mcbsp.1: DXR: 0x3c3b3a39
davinci-mcbsp davinci-mcbsp.1: SPCR: 0x00008000
davinci-mcbsp davinci-mcbsp.1: RCR: 0x00a001a0
davinci-mcbsp davinci-mcbsp.1: XCR: 0x00a001a0
davinci-mcbsp davinci-mcbsp.1: SRGR: 0x303f002f
davinci-mcbsp davinci-mcbsp.1: MCR: 0x00000000
davinci-mcbsp davinci-mcbsp.1: RCER0: 0x55555555
davinci-mcbsp davinci-mcbsp.1: XCER0: 0x55555555
davinci-mcbsp davinci-mcbsp.1: PCR: 0x00000f00
davinci-mcbsp davinci-mcbsp.1: RCER1: 0x00000000
davinci-mcbsp davinci-mcbsp.1: XCER1: 0x00000000
davinci-mcbsp davinci-mcbsp.1: RCER2: 0x00000000
davinci-mcbsp davinci-mcbsp.1: XCER2: 0x00000000
davinci-mcbsp davinci-mcbsp.1: RCER3: 0x00000000
davinci-mcbsp davinci-mcbsp.1: XCER3: 0x00000000
davinci-mcbsp davinci-mcbsp.1: WFIFOCTL: 0x00000001
davinci-mcbsp davinci-mcbsp.1: WFIFOSTS: 0x00000000
davinci-mcbsp davinci-mcbsp.1: RFIFOCTL: 0x00000001
davinci-mcbsp davinci-mcbsp.1: RFIFOSTS: 0x00000000
davinci-mcbsp davinci-mcbsp.1: -------------------------
The mcbsp_test.c from ti：
#include <linux/module.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/moduleparam.h>
#include <linux/sysctl.h>
#include <linux/mm.h>
#include <linux/dma-mapping.h>
#include <linux/delay.h>
#include <mach/memory.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/edma.h>
#include <mach/mcbsp.h>
static dma_addr_t physsrc = 0;
static char *bufsrc = NULL;
static dma_addr_t physdest = 0;
static char *bufdest = NULL;
static int device_id = 1;
static int buf_size = (1 * 1024);
static int buf_fmt = 0;
static int num_pkts = 1;
static int word_len = 8;
static int frame_len = 32;
static int freq = 48000;
static bool dlb = 1;
static int numevt = 0;
static int mc_mode = 0;
static int master = 1;
static int tx_rx = 3;
module_param(device_id, int, S_IRUGO);
module_param(buf_size, int, S_IRUGO);
module_param(buf_fmt, int, S_IRUGO);
module_param(num_pkts, int, S_IRUGO);
module_param(word_len, int, S_IRUGO);
module_param(frame_len, int, S_IRUGO);
module_param(freq, int, S_IRUGO);
module_param(dlb, bool, S_IRUGO);
module_param(numevt, int, S_IRUGO);
module_param(mc_mode, int, S_IRUGO);
module_param(master, int, S_IRUGO);
module_param(tx_rx, int, S_IRUGO);
MODULE_PARM_DESC(device_id, "McBSP instance (default:1)");
MODULE_PARM_DESC(buf_size, "Buffer Size (default:1KB)");
MODULE_PARM_DESC(buf_fmt, "Buffer format (default:Interleaved)");
MODULE_PARM_DESC(buf_size, "Packet count (default:1)");
MODULE_PARM_DESC(word_len, "Word Length: 8, 16, 24, 32 bits (default:32)");
MODULE_PARM_DESC(frame_len, "Frame Length: 1-128 (default:2)");
MODULE_PARM_DESC(freq, "Sample Frequency (default:48kHz)");
MODULE_PARM_DESC(dlb, "Digital Loopback (default: disabled)");
MODULE_PARM_DESC(numevt, "NUMEVT (default: 0)");
MODULE_PARM_DESC(mc_mode, "Multi-channel mode (default: 0)");
MODULE_PARM_DESC(master, "Master/Slave mode (default: master)");
MODULE_PARM_DESC(tx_rx, "Transmit, Receive or both (default: both)");
static int __init mcbsp_test_init(void)
{
struct davinci_mcbsp_dev *dev = NULL;
int i;
int loopcnt = 0;
int errcnt;
if (tx_rx & 0x01) {
bufsrc = dma_alloc_coherent(NULL, buf_size, &physsrc, 0);
if (!bufsrc) {
printk ("dma_alloc_coherent failed for physsrc\n");
return -ENOMEM;
}
for (i = 0; i < buf_size; i++)
bufsrc[i] = i % 256;
}
if (tx_rx & 0x02) {
bufdest = dma_alloc_coherent(NULL, buf_size, &physdest, 0);
if (!bufdest) {
printk ("dma_alloc_coherent failed for physdest\n");
return -ENOMEM;
}
}
printk("Starting McBSP test\n");
davinci_mcbsp_request(device_id, &dev);
do {
/* configure rcr and xcr */
dev->tx_params.word_length1 = word_len; /* 32 bits */
dev->tx_params.frame_length1 = frame_len;
dev->rx_params.word_length1 = word_len; /* 32 bits */
dev->rx_params.frame_length1 = frame_len;
dev->rx_params.buf_fmt = buf_fmt;
dev->tx_params.buf_fmt = buf_fmt;
if (mc_mode > 0 && mc_mode < 8) {
dev->rx_params.intr_mode = 1;
dev->tx_params.intr_mode = 1;
}
davinci_mcbsp_config_params(dev, master);
/* sample rate generator conifguration */
davinci_mcbsp_config_clock(dev, freq);
dev->tx_params.numevt = numevt;
dev->rx_params.numevt = numevt;
dev->tx_params.numdma = 1;
dev->rx_params.numdma = 1;
davinci_mcbsp_config_fifo(dev);
dev->tx_params.mc_mode = mc_mode;
dev->rx_params.mc_mode = mc_mode;
dev->tx_params.cer[0] = 0x5555;
dev->tx_params.cer[1] = 0x5555;
dev->tx_params.cer[2] = 0x5555;
dev->tx_params.cer[3] = 0x5555;
dev->tx_params.cer[4] = 0x5555;
dev->tx_params.cer[5] = 0x5555;
dev->tx_params.cer[6] = 0x5555;
dev->tx_params.cer[7] = 0x5555;
dev->rx_params.cer[0] = 0x5555;
dev->rx_params.cer[1] = 0x5555;
dev->rx_params.cer[2] = 0x5555;
dev->rx_params.cer[3] = 0x5555;
dev->rx_params.cer[4] = 0x5555;
dev->rx_params.cer[5] = 0x5555;
dev->rx_params.cer[6] = 0x5555;
dev->rx_params.cer[7] = 0x5555;
davinci_mcbsp_config_multichannel_mode(dev);
/* DMA Mode */
dev->op_mode = DAVINCI_MCBSP_DMA_MODE;
if (dlb) {
printk("Setting DLB mode \n");
dev->op_mode |= DAVINCI_MCBSP_DLB_MODE;
} else {
printk("No DLB mode \n");
}
if (tx_rx & 0x01) {
printk("Transmitting Packet %d\n", loopcnt + 1);
for (i = 0; i < buf_size; i++)
bufsrc[i] = (i + loopcnt) % 256;
printk("Starting McBSP TX\n");
davinci_mcbsp_start_tx(dev);
}
if (tx_rx & 0x02) {
printk("Starting McBSP RX\n");
davinci_mcbsp_start_rx(dev);
}
printk("McBSP started\n");
if (tx_rx & 0x02) {
printk("Receving data...\n");
davinci_mcbsp_recv_buf(dev, physdest, buf_size);
}
if (tx_rx & 0x01) {
printk("Transmitting data...\n");
davinci_mcbsp_xmit_buf(dev, physsrc, buf_size);
}
if (dev->op_mode & DAVINCI_MCBSP_DLB_MODE) {
wait_for_completion(&dev->tx_params.dma_completion);
printk("...TX complete\n");
wait_for_completion(&dev->rx_params.dma_completion);
printk("...RX complete\n");
}
if (tx_rx & 0x01) {
davinci_mcbsp_stop_tx(dev);
printk("TX stopped\n");
}
if (tx_rx & 0x02) {
davinci_mcbsp_stop_rx(dev);
printk("RX stopped\n");
}
if (tx_rx & 0x02 || (dev->op_mode & DAVINCI_MCBSP_DLB_MODE)) {
printk("Testing data integrity for Packet %d: ", loopcnt + 1);
errcnt = 0;
for (i = 0; i < buf_size; i++) {
if (bufdest[i] != ((i + loopcnt) % 256)) {
errcnt = i + 1;
break;
}
}
if (errcnt) {
#if 1 /* debug */
for (i = 0; i < buf_size; i++) {
if (!(i % 10))
printk("\nbufdest[%d]: ", i);
printk("%d\t", bufdest[i]);
}
printk("\n");
#endif
printk("Error found at Byte %d location\n", errcnt);
davinci_mcbsp_dump_reg(dev);
} else
printk("Passed\n");
memset(bufdest, 0 , buf_size);
} else {
mdelay(100);
/* more time to compare data for large buffers */
if (buf_size > 16 * 1024)
mdelay(1000);
if (buf_size >= 32 * 1024)
mdelay(1000);
}
printk("-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.");
printk("-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.\n");
} while (++loopcnt < num_pkts);
#if 0 /* debug */
davinci_mcbsp_dump_reg(dev);
#endif
return 0;
}
static void mcbsp_test_exit(void)
{
davinci_mcbsp_free(device_id);
if (tx_rx & 0x01)
dma_free_coherent(NULL, buf_size, bufsrc, physsrc);
if (tx_rx & 0x02)
dma_free_coherent(NULL, buf_size , bufdest, physdest);
printk("McBSP test done... exiting\n");
}
module_init(mcbsp_test_init);
module_exit(mcbsp_test_exit);
MODULE_AUTHOR("Texas Instruments");
MODULE_LICENSE("GPL");