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Watchdog settings for low power mode LPM4 or LPM3

Ernesto Leali
Prodigy 50 points
Other Parts Discussed in Thread: MSP430FR5949

Dear Sirs I need your help for an application I'm developing. The MCU is a MSP430G2352 and I have some doubts with the use of the Watchdog. Here attached there is the code (without of all unecessary stuff) for my uC that must manage some keys (keys wake up the machine), display something and then go to low power mode without losing values of variables; the code works well (also the watchdog) but I'm not sure if I'm correctly using it because i don't know what to write in the ISR of the watchdog.

Do I have to fill the WDT ISR just in case i need to use watchdog as a timer?
And another question: If I would like to use LPM3 for the standby, which mantains active ACLK ( in my case ACLK = VLO ) should I disable the watchdog before the machine goes in LPM3? I think not, but I'm not sure, if the machine is in LPM3 it runs slower with VCO as clock so do I need to refresh the watchdog more often? I have tried to don't do the WDTCTL = WDTPW + WDTHOLD;  and the  IE1 &=~WDTIE; before the LPM3 but the uC resets every time after the LPM3... which is the problem ?

Thank you in advance, best regards




volatile unsigned int state_of_machine;

void main(void){
init(); //INITIALIZE ALL REGISTERS
while(1){
task_standby(); //CHECK IF IT IS TIME TO GO IN LOW POMER MODE 4 or 3
task_keysManager(); //MANAGE THE KEYS OF THE KEYBOARD
task_timerManager(); //MANAGE TIMEOUT OR COUNTERS OF THE KEYBOARD
kick_the_dog(); //CLEAN THE WATCHDOG. ALSO INSIDE SOME BLOCKING FUNCTIONS LIKE DELAY
}
}

void init(void){
BCSCTL1 |= 0x0B;
DCOCTL |= 0x60;
BCSCTL1 |= DIVA_1; // ACLK/2 -> Just in case of use LPM3
BCSCTL3 |= LFXT1S_2; // ACLK = VLO
//... code
//enable ISR on keys
WDTCTL = WDT_ARST_1000;
IE1 |= WDTIE;
....
}

void task_standby(void){
//... code
if(standbyOk){
WDTCTL = WDTPW + WDTHOLD;
IE1 &=~WDTIE; //IS IT CORRECT TO CLEAN AND STOP WDT BEFORE TO GO IN LPM4? AND IF IT WAS LPM3? (please notice ACLK active in LPM3)
_BIS_SR(LPM4_bits); -> Go in LPM4, every clock stopped
}
}


void kickTheDog(void){
WDTCTL = WDTPW+WDTCNTCL;
}

#pragma vector=PORT1_VECTOR __interrupt void Port_1(void){
//WAKE UP THE MACHINE AND READ KEYS
_BIC_SR_IRQ(LPM4_bits); -> Wake up from LPM4
//Manage keys
}

#pragma vector=TIMER0_A0_VECTOR __interrupt void Timer_A (void){
//TIMER FOR TIMING OF UART (SOFTWARE) AND OTHER STUFF
//code
}

#pragma vector=WDT_VECTOR __interrupt void watchdog_timer (void){
//DON'T KNOW IF I REALLY NEED THIS
//? - what to put here ?
?
}

  • Guru 227245 points

    The main reason for a watchdog is to ensure the device is kicked up again if it has crashed by external influences like ESD. A watchdog is not meant to ensure proper software working.

    So the default setup for a watchdog is 1) runnihng and 2) resetting the device if a watchdog timeout happens. No ISR is needed at all.

    However, if you are sure you don't want he watchdog resetting your device, you can configure it to act as a simple delay timer. In this case you can decide whether you want it to trigger an ISR if the timer expires (then you'll need an ISR and need to set the WDTIE bit) or jsu twant to look up if the time rhas expired (by checking the WDTIFG bit)

    However, the main purpose of the WDT is to reset the device if it doesn't respond for some reasonl This includes the low power mode. The watchdog will continue running even if the rest of the MSP is sleeping (if you used VLO as WDT source, then even in LPM4, else you may switch the WDT clock source off, stopping the WDT). If the MSP doesn't wake up in time, then the WDT will be triggered. And reset the MSP (in watchdog mode) or wake the MSP for execution of he WDT iISR (in timer mode with WDTIE set)  or do nothing (if disabled, or in timer mode and WDTIE clear)

    If you do WDTCFG = WDTPW|WDTHOLD; the WDT is disabled and won't do anything anymore. And not reset the MSP.

  • in reply to Jens-Michael Gross
    Prodigy 50 points 
    Dear Jean Michael Gross, from what I see in the datasheet or in the user guide, 
    when the uC is in LPM4 all clocks are OFF so how can the watchdog reset the
     mcu when the uC is in LPM4?

    "Low-power mode 4 (LPM4)
    – CPU is disabled
    – ACLK is disabled
    – MCLK and SMCLK are disabled
    – DCO's dc generator is disabled
    – Crystal oscillator is stopped"

    Is VLO active in LPM4? Reading http://www.ti.com/lit/ug/slau144i/slau144i.pdf 
    on page 281 par 5.2.2
     there is written: "The OSCOFF bit disables the VLO for LPM4"
  • in reply to Ernesto Leali
    Guru 227245 points

    Ernesto Leali said:
    on page 281 par 5.2.2
     there is written: "The OSCOFF bit disables the VLO for LPM4"


    This seems to be an incomplete information.

    Looking at the blovk diagrams, this is true for the AFE2x devices which do not have an LFXT1. On the 'normal' 2x devices, OSCOFF disables XT1, and VLO is unaffected by OSCOFF.

    I added this to my list of documentation quirks

    VLO should be active on LPM4 except onthe AFE2x devices (where this is the only difference between LPM3 and LPM4, as VLO is the only source for ACLK on these parts).

  • in reply to Jens-Michael Gross
    Prodigy 50 points

    My English is not very good so maybe I didn't understand what you were saying; If i correctly understood you are saying that VLO doesn't goes off in LPM4 in my case. Everywhere is written that in LPM4 all clocks are off so also VLO should be off. Am I mistaken? Look for example on page 42 of the same document. 

  • in reply to Ernesto Leali
    Guru 227245 points

    Ernesto Leali said:
    Everywhere is written that in LPM4 all clocks are off so also VLO should be off.

    Well, it's a semantics issue.

    VLO is no clock. Clocks are SMCLK, MCLK and ACLK. VLO is an oscillator, a clock source. So the cited sentence is correct even if VLO is not off. In fact, the main purpose for the existence of VLO is that it draws so few current hat it can remain on all the time and serve as a lowcost (low current but also low precision) timebase even if everything else is off.

    The only situation where I would assume VLO  to be off is in LPM4.5, where even RAM retention is disabled and a wakeup requires a cold boot, bu tthe ports pins are still active and sensitive for interrupts.

    Ernesto Leali said:
    Look for example on page 42

    Hmm, since I don't have revision i at hand, I can only guess what you're referring to. There's Fig. 2-9, Table 2.2 and chapter 2.3.1. Nowhere there I see 'VLO' mentioned. Always explicitely SMCLK, ACLK, MCLK and DCO (which actually is a clock source too and not clock signal).

  • in reply to Ernesto Leali
    Prodigy 20 points

    Hi,

    1) I'm using MSP430FR5949 controller, every 20ms I'm enetring into LPM3 and exiting. Will this cause any issue??

    As my program is hanging and WDT reset is happening. 

    2) since in LPM3 all clocks are disabled, is it required to externally disable and enable peripherals on LPM3 entry and exit??

    Thank you,

  • in reply to Shahanaz K
    Guru 227245 points
    LPM3 keeps ACLK running.
    On FR59xx family, all modules issue unconditional clock requests (see clock system description). If a module uses SMCLK, entering LPM3 doesn't disable SMCLK, and if SMLKC is sourced by the DCO, it won't even disable the DOC, effectively resulting in LPM0 instead. In these cases, you 'll need to disable the peripheral (or switch it to a different clock like VLO or an external clock, even if not applied). And when waking up, you'll have to enable them of course.
    See the chapter 3.2.7 (operation from low-power mdoe, requested by peripheral modules) in the users guide.
    How do you wake up from LPM3? Do you wake-up at all? An active watchdog will keep ACLK or SMCLK runing during LPM, that's why it 'barks' when you don't kick it in time. Well, that's it spurpose, isn't it?
  • in reply to Jens-Michael Gross
    Prodigy 20 points

    Thank you for your reply,

    LPM3 wakeup is from

    1) port interrupts( my port interrupts(4) will happen every 20ms i.e, 20ms my device will be in LPM3 and 20ms in AM)

    2) RTC interrupt(every 1 minute)

    I have disabled watch dog while entering LPM3, now my program is hanging their itself, it is not exiting from LPM3.

  • in reply to Shahanaz K
    Guru 227245 points
    This may have various reasons. I'm not really familiar with the FR devices, but things usually work quite similar across the whole MSP family. So the main reasons are:
    - GIE is not set (using the LPM macros should set it implicitly)
    - PxIE.y is not set, so there is no port interrupt triggered.
    - Ports are not set to input or configured for module usage or the wrong interrupt edge is selected and the interrupt signal is open collector

    Besides these more or less obvios things, it may be that things work perfectly - just not as you expect.
    LPM is controlled by bits in the CPU status register. When entering the interrupt service routine (ISR), the status register (including the LPM bits) is saved on stack. So when you exit the ISR, the CPU falls back into LPM and your main code is not progressing. Even though the interrupt was triggered and the ISR was executed.
    To exit LPM based on an interrupt, the ISR needs to use the bic_SR_on_exit(LPM4_bits) macro. It alters the saved copy of the status register on the stack, preventing the CPU from falling back into LPM when exiting the ISR. (the corresponding bis... macro can make the CPU enter LPM when exiting the ISR). This macro can only be used inside an ISR and only in the main ISR code, not in any function called by it.

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