Connecting multiple tiva series microcontroller on daisy chain

 Jtag Daisy chain is a standard so all device can be connected the daisy chain way.. why not do a simple google search with key "Jtag daisy chain"?

 You can also intermix other JTAG devices too...

Hello Karthik,

Roberto is right with his post that it is part of the JTAG specification to be able to daisy chain. I think in the past on the forum I have mentioned JTAG daisy chain of 2 TIVA processors with CCS and XDS100V2. Please note that the Stellaris ICDI will not be able to daisy chain but other off the shelf debuggers would. From a connection perspective

Debugger RSTn connects RSTn of the devices

Debugger TMS connects TMS of the devices

Debugger TCK connects TCK of the devices

Debugger TDI connects to TDI of the first device. TDO of the first device connects to the TDI of the second device and so on, TDO of the last device connects to the Debugger TDO.

Regards

Amit

Amit Ashara said:

I have mentioned JTAG daisy chain of 2 TIVA processors

We recall your mention - and it was done cleverly as you employed 2 separate, Tiva-based launchpads.  (saving you from the necessity to create a custom board)

Poster seems not highly experienced - may very well benefit from trying to extend, "Amit's past, board to board JTAG Daisy Chain" - from 2 boards to 3 - and then beyond.  Again - this avoids the time/effort/expense of creating a special board.  (by the imprecision of the post - one doubts such board exists or is near ready for production...)

Our small group has past (similarly) daisy chained up to 4 devices - one MCU - remainder FPGAs.  I recall that the shorter the traces the better - and that some attention to matched lengths between clock & data yielded faster and more robust data throughput.

The driving source must be capable of this job. (not all are - despite the spec's claim)  As I recall - we eventually used all of our small FPGAs - and reduced the daisy chain from 4 to 2 (switched to new/larger FPGA) - and transfers were then faster and far more robust...  Anecdotal to be sure - but may prove of interest/value...

Hello cb1,

It was on a custom board with a single processor and not the LaunchPad (to clarify). However, yes it was blue-wiring the boards still. Indeed it would be a good idea to do the same with LaunchPad to get the tool chain stabilized before doing a custom board.

Regards

Amit

cb1- said:

The driving source must be capable of this job. (not all are - despite the spec's claim)  As I recall - we eventually used all of our small FPGAs - and reduced the daisy chain from 4 to 2 (switched to new/larger FPGA) - and transfers were then faster and far more robust...  Anecdotal to be sure - but may prove of interest/value...

 Hi CB1, your post remember me amonster I made many year ago, three kind of JTAG existed:

 Network Processor made independent for debug,

 First FPGA JTAG communicating with network processor and all other FPGAs and this one also routing JTAG to all other FPGAS.. A record of 12 FPGA on same board grouped 4 by 4...

It was a large multichannel bidirectional digital audio mixer for audio conference in large halls...

 Today all IPcore can be fit in a single chip and IE Tiva can be used to inject, get audio from to network too.

Hi Roberto,

Certain of our past RF devices may well have "been noted" by your digital audio mixers.  (not an especially wanted - nor pleasant effect)

Our JTAG controlling MCU was tasked w/the "dynamic" reprogramming of several FPGAs - greatly expanding capability - yet severely taxing our JTAG handling/signal management.

As you state - newer more powerful silicon may reduce the dependence upon "daisy chaining" which (to me) faces "diminishing returns" as data speeds & resolution only expand...