Hi, Ti employed.
If the Tiva series still implements the Bosch C_CAN module, I think that there are several error in Tiva C ware CAN driver.
typedef struct
{
//
//! This value holds the sum of the Synchronization, Propagation, and Phase
//! Buffer 1 segments, measured in time quanta. The valid values for this
//! setting range from 2 to 16.
//
uint32_t ui32SyncPropPhase1Seg;
//
//! This value holds the Phase Buffer 2 segment in time quanta. The valid
//! values for this setting range from 1 to 8.
//
uint32_t ui32Phase2Seg;
//
//! This value holds the Resynchronization Jump Width in time quanta. The
//! valid values for this setting range from 1 to 4.
//
uint32_t ui32SJW;
//
//! This value holds the CAN_CLK divider used to determine time quanta.
//! The valid values for this setting range from 1 to 1023.
//
uint32_t ui32QuantumPrescaler;
}
tCANBitClkParms;
The source code CANBitTimingGet() shows psClkParms->ui32SyncPropPhase1Seg = ((ui32BitReg & CAN_BIT_TSEG1_M) >> CAN_BIT_TSEG1_S) + 1;
This means that ui32SyncPropPhase1Seg => CAN_BIT_TSEG1_S = Prop + Phase1Seg, it does't include Sync.
As a result, CANBitTimingSet() function incorrectly set the can bit timing parameter.
For Example,
SystemClock : 80Mhz, BitRate: 500 kbps
CANBitRateSet(CAN0_BASE, 80000000, 500000);
CANBitTimingGet(CAN0_BASE, &g_sCANBitClkParms);
This code set the g_sCANBitClkParms as follows.
g_sCANBitClkParms ->ui32SyncPropPhase1Seg = 8
g_sCANBitClkParms->ui32Phase2Seg = 6
g_sCANBitClkParms->ui32QuantumPrescaler = 9
These are real value( resister value + 1 ).
#define CAN_BIT_VALUE(seg1, seg2, sjw) \
((((seg1 - 1) << CAN_BIT_TSEG1_S) & \
CAN_BIT_TSEG1_M) | \
(((seg2 - 1) << CAN_BIT_TSEG2_S) & \
CAN_BIT_TSEG2_M) | \
(((sjw - 1) << CAN_BIT_SJW_S) & \
CAN_BIT_SJW_M))
static const uint16_t g_ui16CANBitValues[] =
{
CAN_BIT_VALUE(2, 1, 1), // 4 clocks/bit
CAN_BIT_VALUE(3, 1, 1), // 5 clocks/bit
CAN_BIT_VALUE(3, 2, 2), // 6 clocks/bit
CAN_BIT_VALUE(4, 2, 2), // 7 clocks/bit
CAN_BIT_VALUE(4, 3, 3), // 8 clocks/bit
CAN_BIT_VALUE(5, 3, 3), // 9 clocks/bit
CAN_BIT_VALUE(5, 4, 4), // 10 clocks/bit
CAN_BIT_VALUE(6, 4, 4), // 11 clocks/bit
CAN_BIT_VALUE(6, 5, 4), // 12 clocks/bit
CAN_BIT_VALUE(7, 5, 4), // 13 clocks/bit
CAN_BIT_VALUE(7, 6, 4), // 14 clocks/bit
CAN_BIT_VALUE(8, 6, 4), // 15 clocks/bit
CAN_BIT_VALUE(8, 7, 4), // 16 clocks/bit
CAN_BIT_VALUE(9, 7, 4), // 17 clocks/bit
CAN_BIT_VALUE(9, 8, 4), // 18 clocks/bit
CAN_BIT_VALUE(10, 8, 4) // 19 clocks/bit
};
if Sync+ Prop +Phase1Seg = 8 and Phase2Seg = 6, Total Tq(Time quanta) = 14.
In this case, the ui32QuantumPrescaler must have non-integer value or bit rate is not 500kbps.
if Prop +Phase1Seg = 8, Sync =1 and Phase2Seg = 6, Total Tq = 15.
In this case, the ui32QuantumPrescaler should have 11.
I think that there are mutual error in the CAN divice driver bit timing sourcecode and document.
Please check!