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AM5728: Boundary scan questions

Nomo
Guru 16800 points
Part Number: AM5728


Hello,

Please let me know the way to realize the boundary scan on AM5728.
Is only the "trstn" signal used to enter the mode to realize the boundary scan on AM5728?

Best Regards,
Nomo

  • 0
    TI__Guru**** 393215 points
    The factory team have been notified. They will respond here.
  • 0
    TI__Genius 13567 points
    Hello Nomo,

    To perform boundary scan testing on a chip you need boundary scan software, the chip bsdl file, debug hardware (xds100v2, xds200, xds560) and your board netlist. TI provides the chip bsdl file on the product page under "Simulation Models". We can provide support of the file if there are bugs found.

    Regards,
    Ahmad
  • 0 in reply to Ahmad_Rashed
    Guru 16800 points
    Hello Ahmad-san,

    Thank you for you reply.
    My customers want to know the procedures in hardware to enter AM5728 of debug (JTAG boundary scan) mode.
    Please let me know procedures of not only the software but also the hardware.
    In my customer's situation, the TDO signal doesn't output despite they input the signal (e.g. TDI and CLK).

    Best Regards,
    Nomo
  • 0 in reply to Nomo
    TI__Genius 13567 points

    Hi Nomo,

    If the EMU0 and EMU1 pins have pull-up during the AM57xx power-on-reset (POR), then the ICEPick TAP controller should be available to access. The simplest test would be to enter BYPASS mode to see if the chip can make TDO output the same as the TDI input. Is the customer familiar with the TAP state machine?

    If TMS=1 and then when TCLK toggles at least 3 times this will reset the TAP state machine to the beginning. FYI TCLK is generally a free-running clock and state changes occur depending on if TMS =0 or =1. From there you can control the TAP state machine to enter bypass mode by shifting the bypass opcode into the instruction register (refer to "jtag technical overview" below). The instruction register length and instruction register opcode are from the AM57xx BSDL file. The rest of this information is not unique to Sitara so more information can be found in the IEEE 1149.1 specification. 

    Introduction to TAP controller state machine: jtag technical overview

    Specification pdf for IEEE 1149.1: ieee standard test access port and boundary-scan architecture

    Guide with some examples: boundary scan tutorial

  • 0 in reply to Ahmad_Rashed
    Guru 16800 points
    Hello Ahmad-san,

    Thank you for your reply.
    Everything is clear.

    Best Regards,
    Nomo