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[FAQ] AM625/AM623 Custom board hardware design – Reading DEVICE_ID and Unique SOC (CPU) ID

Kallikuppa Sreenivasa
Guru**** 225635 points

Other Parts Discussed in Thread: AM62L, AM62D-Q1

I have the below queries regarding the DEVICS_ID 

  1. Is there a device ID available that I can read?
  2. Can you guide me how to read the device ID?
  3. Is the ID unique for each device?
  4. Is there an ID that is unique to each device?

 [FAQ] PROCESSOR-SDK-AM62X: How to read device Id register 

  • 0
    TI__Guru**** 225635 points

    Hi Board designers, 

    Refer below inputs for Reading DEVICE_ID related queries.

    1. Is there a device ID available that I can read?

    The SoC provides register that could be read to identify the device.

    2. Can you guide me how to read the device ID?

    Below are the steps to read the device ID. Please refer the below TRM section.

    1.7 Device Identification

    6.1.1.3.3 WKUP_CTRL_MMR Registers
    Table 6-1303. cfg0, WKUP_CTRL_MMR0_CFG0 Registers, Base Address=4300 0000H, Length=131072

    14h,32, WKUP_CTRL_MMR_JTAGID,4300 0014h
    18h, 32, WKUP_CTRL_MMR_JTAG_USER_ID,4300 0018h

    I was analyzing the TRM, and it is referred the DEVICE_ID in table1-1



    What is the purpose of this value and what register I can find it?

    Please refer data sheet 

    3.Is the ID unique for each device?

    This ID can be used to identify the SoC device type and is not unique to every device.

    4. Is there an ID that is unique to each device?

    The MAC ID is unique to each device. 

    For now, we have the MAC ID that would be unique to each device,

    Reading MAC ID 

    This is a 48-bit value. refer TRM for the MSB and LSB register.

    Please refer below MAC ID read from one of the devices (SoC).

    MAC Address Lookup

    1c-63-49-1b-c1-83

    FYI, here is the info from another device.

    1c-63-49-22-5f-be

    Refer below. FAQ to read the device ID.

    (+) [FAQ] PROCESSOR-SDK-AM62X: How to read device Id register - Processors forum - Processors - TI E2E support forums

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Guru**** 225635 points

    Hi Board Designers,

    Please refer information related to AM62Px

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Guru**** 225635 points

    Hi Board Designers,

    Please refer information related to AM62Ax

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Guru**** 225635 points

    Hi Board Designers,

    Please refer information related to JTAG ID

    Could you tell me the purpose of MMR0_JTAG_USER_ID? When customer should use this register?

    The register tells the device type information, as documented in the TRM section 1.7 "Device Identification". It can be used in software to configure the device accordingly.

    For example, U-Boot and Linux kernel uses this register to support all the AM62x device variants. But Linux user space application doesn't need to care about this register.

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Guru**** 225635 points

    Hi Board Designers,

    Please refer information related to AM64x

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Guru**** 225635 points

    Hi Board Designers,

    Please refer information related to AM62L

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Guru**** 225635 points

    Hi Board Designers,

    Please refer information related to AM62D-Q1

    Note:

    I’m working with two chips from the same family:

    • AM62X uses a simple pattern mapping (A→1, B→2, …) and we decode values based on that rule.

    • AM62D appears to hardcode these values instead of following the pattern.

    When I apply the AM62X-style pattern to AM62D, 2 out of 3 values match, but the third one doesn’t. P(16) and R(18) line up, but 20 maps to T under the pattern, while on the second chip it should correspond to V (22).

    So it looks like we can’t rely on a single pattern for both chips — either there’s a variant-specific offset/gap, or the second chip uses a lookup table rather than a formula.

    Regards,

    Sreenivasa