Q: Why does my Code Composer Studio GEL file enable the CLA clock on reset?

Q: Can I start a task from the debug (Code Composer Studio) window?

Q: CLA: If two masters (ex: C28x and CLA) can access the same device resource, which has priority?

Q: Can the CLA interrupt the C28x CPU? When and how can the CLA send an interrupt to the C28x?

Q: If the CLA takes an ADC interrupt, can the CLA then clear the ADC interrupt flag? If not, then how can I clear the flag?

Q: What can trigger a task? Which peripherals can trigger a CLA task? Can the C28x trigger a task in software? Can a CLA task trigger another task?

Q: How can I calculate how much time a CLA task takes to execute? or How do I profile a CLA task? What overhead should be included?

Part Number: LM5114 Other Parts Discussed in Thread: LMG1020 What is the maximum operating frequency of this gate driver (LM5114BMF/NOPB)? I would like 24 MHz. Maximum operating/switching frequency of a gate driver depends on many factors including…

FAQ: Logic and Voltage Translation > Voltage Translators >> Current FAQ Some of the TI translators have requirements during normal operation mode to have Vcca <= Vccb ( TXS/ TXB01xx) or Vrefb>= VrefA+0.8V(LSF). However, the TI translation devices do…

FAQ: Logic and Voltage Translation > Logic Technology >> Current FAQ The I OFF specification guarantees the I/O ports are in high impedance whenever either one of the power supply is at pulled to ground (0V) or close to gnd(<100mV as specified for the…