Frequent Questions

  • [FAQ] AM6442: Enabling SOP8 208mil and SOP16 300mil Co-Layout for Winbond Flash in a Single PCB Design

    Part Number: AM6442 Just a quick information share for anyone who may encounter a similar situation. I recently heard from a designer working on an AM6442-based project who faced a PCB layout challenge due to component sourcing flexibility requirements…

  • [FAQ] How to create and maintain a standalone project with MSPM33-SDK?

    Part Number: MSPM33-SDK 1.Import empty example from SDK as a customer’s project. 2.Build project. Copy the 4 files which Sysconfig created to customer’s project. 3.Copy below files from SDK to the customer’s project. Recommend following the…

  • [FAQ] ADT7408 EOL Replacement | TMP1075 I2C and SMBus Temperature Sensor

    Part Number: TMP1075 Is there a fit replacement for the discontinued ADT7408 temperature sensor?

  • [FAQ] F29H859TU-Q1: Hardware Security Module's Software is immutable or not?

    Part Number: F29H859TU-Q1 The datasheet, however, does not explicitly state whether: The HSM firmware is factory-programmed and immutable? Or User-updatable? Or Partially user-programmable with TI root services remaining protected? Please…

  • [FAQ] AM13E23019: AM13E23019 EPI driver unable to see the register values in Memory Browser

    Part Number: AM13E23019 Hi, While using CCS 21.0.1 and AM13E2X SDK 26.01.00.03 , If we try to run the example: am13e230x_sdk_26_01_00_03\examples\driverlib\epi\epi_sdram_read_write and see the register values at address 0x4001A000 onwards in the memory…

  • [FAQ] MSPM33C321A: Phase-Shifted PWM Techniques in MSPM33/MSPM0

    Part Number: MSPM33C321A Other Parts Discussed in Thread: SYSCONFIG 1. Background While standard PWM provides a fixed duty cycle via a single CC register, advanced applications may require phase-shifted or multi-pulse outputs. This guide explains…

  • [FAQ] F29H850TU: HSKP state shows wrong Bankmode value

    Part Number: F29H850TU The bankmode value that I see in the BANKMODE register in the HSKP state is aways 0. It doesn't match the bankmode programmed in HSFS state.

  • [FAQ] J784S4XEVM: RAT configuration for Jacinto platforms

    Part Number: J784S4XEVM RAT configuration from simple example

  • [FAQ] TMCS2100-Q1: Getting Started with the TMCS2100-Q1

    Part Number: TMCS2100-Q1 Other Parts Discussed in Thread: TMCS2100CHAREVM , TMCS2100 , TMCS2100EVM I am wanting to start evaluating the TMCS2100-Q1 for my system. What resources do you have and how can I get access to materials I need?

  • [FAQ] 3D CNN / Pooling TO 2D CONVERSION FOR TIDL

    Part Number: PROCESSOR-SDK-RTOS-J784S4 OVERVIEW TIDL's C7x DSP only runs 2D convolution and 2D pooling. This tool rewrites Conv3D, MaxPool3D, and AveragePool3D nodes in an ONNX model into equivalent sequences of 2D operations. The conversion is mathematically…

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