Part Number: ADC09QJ800-Q1 Tool/software: Hello forum
I am using an Arria 10 FPGA as the receiver for this ADC.
The link is not working, and as far as I can tell the synchronization sequence is not completing (based on the fact that the SYNC_N signal…
Part Number: ADC09QJ800 I am having trouble understanding the datasheet (SBASAG1 - October 2021).
Table 8-63 states:
Activate low voltage PECL mode for DEVCLK. The internal termination for each input pin (CLK+ and CLK–) becomes a 50-Ω resistor…
Part Number: ADC09QJ800 I intend using the ADC in quad converter mode, where JMODE=2.
I want to confirm my understanding of the transport layer mapping described in section 8.4.2.1 of the data sheet.
Does table 8-23 mean that each lane will be carrying…
Part Number: ADC09QJ800 Other Parts Discussed in Thread: ADC09SJ800 Hi team,
The 3 ADC09SJ800 form 12 channels with 12-bit resolution and transfer data through JESD204.
Is it possible to transmit data from three ADCs simultaneously as shown in Table 8…
Part Number: ADC09DJ800-Q1 Other Parts Discussed in Thread: ADC09QJ800 Hello,
I am confused about what is the absolute maximum input voltage to the input pins: INA+, INA–, INB+, INB–, INC+, INC–, IND+, IND–.
is it +/-1V or VA11 that…
Part Number: ADC09QJ800 Other Parts Discussed in Thread: ADS54J66 This part seems a perfect fit for our next project in terms of $ and performance.
Except - that we require only 210 MSPS and this device is spec'ed at 500 MSPS minimum.
Of course, we…
Part Number: THS4521 Other Parts Discussed in Thread: ADC09QJ800 , Hello,
I am considering this part as driver to TI's ADC09QJ800.
In my application the signal will start from close to DC up to about (only) 120MHz.
(Yes - I know this ADC may seem an…
