Search tips
Showing 5 results View by: Thread Post Sort by
    Answered

  • ADC12QJ1600-Q1: CPLL jitter spec and its applicaiton & SYSREF windowing

    Resolved
    Part Number: ADC12QJ1600-Q1 Other Parts Discussed in Thread: ADC12QJ1600 Hi, experts, I'm assessing the ADC12xJ1600 for our LiDAR project, now I have 2 issues, could you please help me check in details? thanks a lot. 1. internal CPLL output jitter…
    • Resolved

  • ADC12QJ1600-Q1: SYSREF+,- , SYNCSE, TDIODE+,- test plan required

    TI Thinks Resolved
    Part Number: ADC12QJ1600-Q1 Dear Team, Please suggest how to write test plan for the SYSREF+,- , SYNCSE, TDIODE+,- signals also.

  • ADC12QJ1600-Q1: GAIN_TRIM Register

    TI Thinks Resolved
    Part Number: ADC12QJ1600-Q1 In ADC12QJ1600-Q1 datasheet , under GAIN_TRIM Register two different description is given as Gain DAC Trim and This register trims the gain of all ADC cores. here DAC and ADC terms confuses me, please let me clear on this.

  • ADC12QJ1600-Q1: Need Jitter value for the SERIAL DATA OUTPUTS (D[7:0]+, D[7:0]–), Which is not mentioned in datasheet.

    TI Thinks Resolved
    Part Number: ADC12QJ1600-Q1 Dear team, We have used ADC12QJ1600-Q1 in our design, we are using only D0± to D5± Digital outputs. We are writing test plan now, please let me know how to test this ADC input and output pins.. we are using Default FSR voltage…
    • Answered

  • RE: ADC32RF42: Sampling

    Resolved
    Hi user, To operate at 1.5GSPS, input clock frequency should be 1.5GHz. Each ADC channel is internally interleaved two times. So there is a divide-by-2 clock divider to provide clocks to individual ADC cores. The block diagram in datasheet mistakenly shows…

Didn't find what you are looking for? Post a new question.