Search tips
Showing 233 results View by: Thread Post Sort by

  • LMK04826: Synchronizing problems of two ADS52j90

    Part Number: LMK04826 Other Parts Discussed in Thread: ADS52J90 , Tool/software: I have trouble to snychronize two ADS52j90 with the LMK04826. I have 10 % of the startups a data mismatch by one clock cycle. Now I tried to startup the lmk as described in…

  • RE: ADS52J90: JESD protocol, eight-chip ADC synchronization problem

    Hi, LMK04832 already has 15 pairs of CLKs + SYSREFs. We would recommend to use these clocks directly to drive each ADS52J90 devices. Thanks, Karthik N
    • Answered

  • ADS52J90: ADC timing

    Resolved
    Part Number: ADS52J90 Other Parts Discussed in Thread: THS4551 , THS4509 Tool/software: Hello, I have a couple of quick questions regarding the ADC input stage in the ADS52J90: 1) I'm trying to simulate the ADC input stage as per the schematic in the…
    • Resolved

  • RE: ADS52J90: Auto offset mode: how is computed the dc value value substracted

    Ok. You can use that .Hopefully with this you can get the required offset .
    • Answered

  • TI-JESD204-IP: ADS52J90 K value =3 for 4 lane mode JESD IP does not work

    Resolved
    Part Number: TI-JESD204-IP Other Parts Discussed in Thread: ADS52J90 Tool/software: Hello, I am not sure if this question to be asked in ADS52J900 specific thread but since related to JESD IP, posting it here. In 4 lane mode of ADC ADS52J90, (Ref : Table…
    • Resolved

  • RE: ADS52J90: Runtime change in clock to data delay

    Hi, We had seen in one customer issue was coming at low temp on few devices. After testing the device in multiple internal test modes, it was found that the PLL inside the LVDS block gets disturbed every cycle when this temperature shock occurs. This…
    • Answered

  • ADS52J90: Maximum delay between DVDD_1V2 turn on and 1V8 Rail turn on

    Resolved
    Part Number: ADS52J90 Tool/software: Hello! Looking at Figure 95 from the ADS52J90 datasheet, it looks like there is no timing specification for the maximum value of 13, which is the time between start of ramp up of DVDD_1V2 and the start of ramp up…
    • Resolved
    • Answered

  • RE: ADS52J90: What does the IDLE_MODE register bit represent?

    Resolved
    This mode is used before jesd link is established .If we want to send initial BC50 pattern on all lanes .

  • ADS52J90: ADS52J90EVM

    Part Number: ADS52J90 Tool/software: Hi, I cannot start the application " SLOC326 — HMC-DAQ GUI, v2.8" on my windows 10 enterprise? I tried the already availabe solutions in the forums but they donot work in my case.

  • ADS52J90: Analog input termination and coupling

    Part Number: ADS52J90 I can't find this one being asked previously. I am interfacing the ADS52J90 inputs to 100Ω differential (Zdiff) analog outputs from another device. The datasheet figure 89 is as follows but I don't understand why it has both 100Ω…

Didn't find what you are looking for? Post a new question.