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Clock & timing

Clock & timing

Clock & timing forum

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Texas Instruments (TI) Clock & timing support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search clock & timing IC content or ask technical support questions on everything from clock synchronizers and generators to clock buffers and timers. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.

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Frequent questions
  • [FAQ] LMK5B33216: Determining impact of supply voltage noise and PSNR specification on output phase noise

    Timothy T
    Timothy T
    Part Number: LMK5B33216 This covers the math to simulate clock output phase noise noise as a result of voltage supply noise using PSNR and then creating a voltage supply noise mask based on your requirements. How to use PSNR data and input voltage…
    • 10 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] The What and How of TI DPLLs (What is a DPLL? How does a DPLL work?)

    Jennifer Bernal
    Jennifer Bernal
    Part Number: LMK5B33216 [DPLL Training Slides] The What-How of TI DPLLs_share, e2e.pdf
    • 10 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] PLLATINUMSIM-SW: PLL Training Material

    Dean Banerjee
    Dean Banerjee
    Part Number: PLLATINUMSIM-SW Attached is a detailed training on PLL Theory PLL Fundamentals Full Training (Public).pdf
    • 10 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] LMK5B33216: How to choose the loop bandwidth for your PLL

    Timothy T
    Timothy T
    Part Number: LMK5B33216 Here's some information on choosing a loop bandwidth for your PLL to optimize noise performance. The presentation starts with some general theory on noise and PLLs, discusses how to pick loop bandwidth for a "PLL/VCO optimized…
    • 10 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] TLC555: What are the performance differences expected for TLC555 PCN 20231130002.1?

    Ron Michallick
    Ron Michallick
    Part Number: TLC555 Other Parts Discussed in Thread: , TLC3555-Q1 , TLC3555 Tool/software: PCN 20231130002.1 is the “Qualification of RFAB using qualified Process Technology, Die Revision, Datasheet update and additional Assembly Site/BOM options…
    • Answered
    • over 1 year ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Does TI have crosses for obsolete Analog Devices HMC103x, HMC7xx, HMC8xx PLL family products and other discontinued products such as ADF5610 and HMC987 as per the Product Discontinuance Notice issued by ADI on March 22, 2022?

    Vibhu  Vanjari
    Vibhu Vanjari
    TI’s wide portfolio of RF PLLs & synthesizers features devices that are potential crosses for Analog Devices HMC103x, HMC7xx, HMC8xx PLL family products and other discontinued products such as ADF5610 and HMC987. With most of TI’s RF PLLs & synthesizers…
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] TPL5010: How to disable the watchdog function of TPL5010

    Dong Shen1
    Dong Shen1
    Part Number: TPL5010 Hi all, I am a FAE of TI,now my customer has a watchdog disabled problem, so I synchronously ask you for a solution: Problem Description: the customer's MCU wants to disable the watchdog function during the recording program…
    • Answered
    • over 5 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Clock Buffers: How to connect the unused pins?

    Kia Rahbar
    Kia Rahbar
    When a pin on my clock buffer is not being used, what is the correct termination?
    • Answered
    • over 5 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Clock Buffers: Can my buffer handle an input while it is powered off?

    Aaron Black
    Aaron Black
    If my buffer is powered off can an input go into the device without damaging it?
    • Answered
    • over 5 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] RF synthesizers: How to deal with the unused output differential pin in a RF synthesizer?

    Noel Fung
    Noel Fung
    I need single-ended output, how to deal with the unused output differential pin?
    • Answered
    • over 5 years ago
    • Clock & timing
    • Clock & timing forum
>

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  • Not Answered

    Replace Renesas & SiTime Data Center PCIe Clocking Solutions with TI Buffers & Oscillators. 0

    1489 views
    0 replies
    Started 6 months ago
    by CP Ong
  • Not Answered

    [FAQ] The What and How of TI DPLLs (What is a DPLL? How does a DPLL work?) 0

    1560 views
    1 reply
    Latest 10 months ago
    by Timothy T
  • Not Answered

    CDCUN1208LP: Clock buffer timing appears to be not met by my design. Adding capacitors didn't help. Other Ideas? 0

    32 views
    4 replies
    Latest 1 hour ago
    by Tristan Morris
  • Not Answered

    LMX2594: LMX2594 ramp limit low and high 0

    15 views
    1 reply
    Latest 1 hour ago
    by Brian Mace
  • Not Answered

    LMK04832: LMK04832 Debugging Issue 0

    17 views
    1 reply
    Latest 1 hour ago
    by Brian Mace
  • Suggested Answer

    LMK05028EVM: LMK05028EVM config as a 100 MHz to 10/100 MHz fanout 0

    50 views
    3 replies
    Latest 4 hours ago
    by Jaryd Dukes
  • Answered

    LMK04832: Inquiry Regarding LMK04832 Datasheet 0

    279 views
    8 replies
    Latest 8 hours ago
    by Noel Fung
  • Suggested Answer

    LMX2820: TICS Pro 2 – LMX2830-TC Device Profile Availability 0

    77 views
    7 replies
    Latest 8 hours ago
    by Noel Fung
  • Not Answered

    MSPM0-SDK: MSPM0L1306:Is GPIO wake-up detection in STANDBY0 mode based on a 32-kHz clock or asynchronous logic? 0

    18 views
    0 replies
    Started 18 hours ago
    by りょう ひらやま
  • Not Answered

    F29H85X-MCAL-SDK: GPT-Interrupt Issue 0

    98 views
    4 replies
    Latest 18 hours ago
    by Pranav Siddappa
  • Answered

    LMK03318: Fail to Offline Program LMK03318 0

    60 views
    7 replies
    Latest 18 hours ago
    by Tianshu Guo
  • Suggested Answer

    CDCP1803: LVDS Input Coupling Options - AC-coupled or DC-coupled Support 0

    38 views
    2 replies
    Latest 1 day ago
    by Yuxi Liu(Tony)
  • Suggested Answer

    LMK1C1106: COO for LMK1C1106PWR for different finish 0

    47 views
    2 replies
    Latest 1 day ago
    by Tristan Morris
  • Suggested Answer

    LMX2594EVM: LMX2594EVM: Automating RF Output Startup After Power-Up 0

    41 views
    1 reply
    Latest 1 day ago
    by Brian Mace
  • Answered

    LMK04906BEVAL: Gerbers or PCB files 0

    35 views
    2 replies
    Latest 1 day ago
    by ken staton
  • Suggested Answer

    LMX2820: LMX2820 phase synchronization over frequency hopping 0

    30 views
    1 reply
    Latest 1 day ago
    by Noel Fung
  • Suggested Answer

    LMK5B33216: Output Issue 0

    119 views
    4 replies
    Latest 1 day ago
    by Jaryd Dukes
  • Suggested Answer

    SN74AVC1T45: E2E Query – SN74AVC1T45DBVR Support for 100 MHz Clock Level Translation 0

    22 views
    1 reply
    Latest 1 day ago
    by Joshua Salinas
  • Suggested Answer

    LMX2572LP: Need Recommended land pattern information for LMX2572LPRHAR 0

    15 views
    1 reply
    Latest 1 day ago
    by Noel Fung
  • Answered

    CDC6C: PS reference clock oscillator for UltraScale+ FPGA: CDC6Cx vs LMK6Cx 0

    29 views
    1 reply
    Latest 2 days ago
    by Michael Srinivasan
>