• 

  Mahmoud Zannerni62

  • 6 months ago
  • Data converters
  • Data converters forum

  ADS42LB49: ADS42LB49 Vs ADS5500 SNR

  • Resolved

  ADS5500 using differential clock source ADS42LB49 using cmos clock source The input signal is about 8 MHz
• 

  Subash M10

  • over 3 years ago
  • Data converters
  • Data converters forum

  ADS5500: fixed point type Qm.n

  Part Number: ADS5500 Hi, I am using ADS5500 14 bit ADC. The datasheet of ADC is that has provided straight binary format and 2's complement format. I am using straight binary format. It is a 14 bit ADC. Then what is the fixed point type such as...
• 

  Rogerio Rilhas

  • over 4 years ago
  • Data converters
  • Data converters forum

  RE: ADS5500: Repetitive start/stop for interleaving

  Hi, I hadn't noticed that, thank you for pointing it out. That is a definitive show stopper (the whole signal lasts only 100 clocks). The alternative I can think of is to keep the clocks running, and when the trigger is detected apply the delay...
• 

  Alec Saebeler

  • over 1 year ago
  • Data converters
  • Data converters forum

  RE: ADS4122: Recommended driver

  Hi Mochizuki, While looking over the THS4511 datasheet in order to respond to your question, I found a potentially useful section on the applications of the THS4511. In particular, this section discusses the default common mode output of the THS4511...
• 

  Veerasamy Vasudevan

  • over 4 years ago
  • Data converters
  • Data converters forum

  RE: ADS5500 Input Protection

  Hi, Thanks a lot. This is very helpful.
• 

  Shashank Chintalagiri

  • over 5 years ago
  • Data converters
  • Data converters forum

  ADS5500 Clock Frequency (Help with Datasheet Interpretation)

  • Resolved

  I need some help understanding the ADS5500 datasheet. What I would like to know is the Clock
• 

  CktM

  • over 7 years ago
  • Data converters
  • Data converters forum

  Question regarding relative phase of multiple ADS5500 digitizer when DLL enabled

  TI Thinks Resolved

  If I have two ADS5500 digitizers with DLL enabled both running off a common clock and measuring the same input signal will the relative phase of the two digital outputs have a fixed relationship from one power up to the next. There is an attached sketch...

  • ADS5500 phase question graphic.pdf
• 

  Hooman Hashemi

  • over 7 years ago
  • Amplifiers
  • Amplifiers forum

  RE: Report SBAA113 "PCB Layout..."

  Hello Mark, I don't have any gerber files to share, but I want to chime in on what "between the supplies" means in the Application Report you have noted: ADS5500, OPA695: PC Board Layout for Low Distortion High-Speed ADC Drivers It...
• 

  Shrinivas Gotur

  • over 7 years ago
  • Data converters
  • Data converters forum

  Problem with ADS5500 output

  • Resolved

  I am using ADS5500 14-bit parallel configuration adc in my board interfaced to virtex-4 FPGA
• 

  RF

  • over 10 years ago
  • Data converters
  • Data converters forum

  ADS5500 & DAC5687 Grounding Question

  • Resolved

  I am using the ADS5500 and the DAC5687 in a digital radio design and I am looking for some guidance

Didn't find what you are looking for? Post a new question.

• Ask a new question