Other Parts Discussed in Thread: ADS5542 Hi.
I'm developing an Analog to Digital frontend,
In my project I've used two ads5542 , they are drive by a Xilinx FPGA. Thanks to the FPGA i'm able to drive the ADC by an asyncronous reset, to able/disable…
Couple of quick things Akash,
1. Where is your DC bias current path for the V+ inputs to the op amps?
2. This differential I/O op amp circuit sometimes has a common mode oscillation - probably not here, but we did see that in the OPA838 decomp device…
