Hi,
On that generation of devices, the digital data was generally expected to be clocked into an FPGA or ASIC using a copy of the same sample clock that goes to the ADC itself. I don't see an EVM specific for the ADS809, but EVMs for similar devices…
Couple of quick things Akash,
1. Where is your DC bias current path for the V+ inputs to the op amps?
2. This differential I/O op amp circuit sometimes has a common mode oscillation - probably not here, but we did see that in the OPA838 decomp device…
