• CDCDB803: Parallel Clock Buffer

  

  Johann Fort

  TI Thinks Resolved

  Part Number: CDCDB803 Other Parts Discussed in Thread: LMKDB1120 , Hello, I am looking to use two clock buffers in parallel with two CDCDB803 components. Inputs are connected to a PCIE Gen 4 clock Is this setup feasible? How can I optimize this…

  • over 1 year ago
  • Clock & timing
  • Clock & timing forum

• CDCDB803: Can CKPWRGN_PD# be pulled high for non-smb operation

  

  first_name Grant

  TI Thinks Resolved

  Part Number: CDCDB803 I would like to use the CDCDB803 in an application without a micro-controller. Will pulling CKPWRGN_PD# high, to VDDR, be sufficient for the part to work? All OE pins will be tied to ground.

  • over 1 year ago
  • Clock & timing
  • Clock & timing forum

• CDCDB803: External Terminations

  

  first_name Grant

  TI Thinks Resolved

  Part Number: CDCDB803 The data sheet uses the phrases "Typically connected directly to PCIe differential clock inputs", and "integrates a large amount of external passive components". I interpret this to mean this to mean the typical external termination…

  • over 2 years ago
  • Clock & timing
  • Clock & timing forum
Answered

• CDCDB803: Questions about the Clock input/output circuit configuration of CDCDB803.

  

  Seung-Gon Hong

  Resolved

  Part Number: CDCDB803 Hi, I have the below question about cdcdb803 . 1. How should the circuit of the CLKIN pin be configured when a 3.3V level cmos single-ended signal is used as an input? 2. How should the circuit of the CK0~CK7 output pins…

  • Resolved

  • over 3 years ago
  • Clock & timing
  • Clock & timing forum
Answered

• CDCDB803: CKPWRGD_PD# state if not using SMBUS

  

  M T

  Resolved

  Part Number: CDCDB803 Other Parts Discussed in Thread: CDCDB800 , CDCDB400 If not using SMBUS, can the CKPWRGD_PD# pin be left no connect (and pulled low via 180K pulldown)? Or should it be pulled high? The pin configuration section states "If unused…

  • Resolved

  • over 1 year ago
  • Clock & timing
  • Clock & timing forum
Answered

• CDCDB803: A Few quick questions

  

  Cameron Perl

  Resolved

  Part Number: CDCDB803 Hey team, Just a few questions regarding the 1:8 clock buffer! What is the common mode for clock input? If AC coupled, does it need to be biased? Does clock input have internal termination or not? Thanks for your…

  • Resolved

  • over 3 years ago
  • Clock & timing
  • Clock & timing forum
Answered

• CDCDB803: selectable SMBus addresses consult

  

  Stanley Dai

  Resolved

  Part Number: CDCDB803 Other Parts Discussed in Thread: CDCDB800 , Hi Team, I check the D/S between CDCDB800 and CDCDB803, the major difference I find is that CDCDB803 has selectable SMBus addresses function. I'm quite curious about the usage of this…

  • Resolved

  • over 3 years ago
  • Clock & timing
  • Clock & timing forum
Answered

• CDCDB800: Thermal pad size consult

  

  Stanley Dai

  Resolved

  Part Number: CDCDB800 Other Parts Discussed in Thread: CDCDB803 Hi Team, Customer is consulting the detailed size of thermal pad. Pls help us here because our D/S doesn't contain it. Best, Stanley

  • Resolved

  • over 3 years ago
  • Clock & timing
  • Clock & timing forum
Answered

• CDCDB800EVM: PCB design file consult

  

  Stanley Dai

  Resolved

  Part Number: CDCDB800EVM Other Parts Discussed in Thread: CDCDB800 , CDCDB803 , Hi Team, Customer is quite interested in our CDCDB800 and CDCDB803. They want the PCB design file of CDCDB800EVM as reference. Could you pls kindly update those info to…

  • Resolved

  • over 3 years ago
  • Clock & timing
  • Clock & timing forum

• RE: CDCDB400: What should we do with the CKPWRGD_PD# pin if this functionality is not needed?

  

  Andrea Vallenilla

  Hello Michel, You are correct, the pin should not be left no connect. Instead, please pull it high externally. More info on this E2Es as well: https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1262670/cdcdb803-ckpwrgd_pd…

  • over 1 year ago
  • Clock & timing
  • Clock & timing forum

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