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Showing 517 results View by: Thread Post Sort by
    Answered
  • CDCE62005: loop filter

    morgan park
    morgan park
    Resolved
    Part Number: CDCE62005 Other Parts Discussed in Thread: TMS320C6678 Tool/software: CDCE62005 Loop Filter Setting Inquiry. I want to set the same as TMS320C6678 EVM Board, Product name: DSPM-8301E. Currently, PLL Lock is unstable. It seems to be a problem…
    • Resolved
    • 9 months ago
    • Clock & timing
    • Clock & timing forum
  • CDCE62005: Inquiry about device configuration

    JH Shin
    JH Shin
    TI Thinks Resolved
    Part Number: CDCE62005 Hello, The customer attempted to create the configuration below using the CDCE62005 GUI, but an error occurred. - AUX IN : 25MHz - Output 0 : 100MHz / Output 2 : 66.667MHz / Output 3 : 100MHz Below is the error message. Please…
    • over 1 year ago
    • Clock & timing
    • Clock & timing forum
  • RE: CDCE62005: the second stage of CDCE62005 couldn't lock

    Kadeem Samuel
    Kadeem Samuel
    Huang, I would recommend changing these so that the loop filters are stable for these devices. I would advise retesting a subset of the boards to ensure that there are no issues with the new loop filter. Thanks, Kadeem
    • over 1 year ago
    • Clock & timing
    • Clock & timing forum
  • CDCE62005: SPI interface and burn options

    Daniel Hoasov Cohen
    Daniel Hoasov Cohen
    TI Thinks Resolved
    Part Number: CDCE62005 Dear TI support, Appreciate your answers to the following questions below: 1. Does CDCE62005 come pre-burned from TI with our specific specifications? 2. The clock generator need to be configured every power-up? 3. Is there an external…
    • over 1 year ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCE62005: Unused clock output connection

    Daniel Hoasov Cohen
    Daniel Hoasov Cohen
    Resolved
    Part Number: CDCE62005 Other Parts Discussed in Thread: TMS320C6655 Hello, I connect CDCE62005 to TI DSP TMS320C6655, but I using only 3 input clocks in this DSP, (Core, SGMII, and DDR) so I need only 3 LVDS outputs from CDCE62005. Should I leave the unused…
    • Resolved
    • over 1 year ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCE62005: Unused PRIREF+/-, SECREF+/- , EXT_LF(P/N) and AUXIN connection

    Daniel Hoasov Cohen
    Daniel Hoasov Cohen
    Resolved
    Part Number: CDCE62005 Other Parts Discussed in Thread: LMK6C Hi, I need your expert advice. The idea is to use this component as basic LVDS output OSC with 3 outputs 250, 50 and 100MHz 1. I can not use pins 43 (Auxin), SECREF(3,2), and PRIREF(45,46)…
    • Resolved
    • over 1 year ago
    • Clock & timing
    • Clock & timing forum
  • CDCE62005: how to init and program 62005

    hank zhong
    hank zhong
    TI Thinks Resolved
    Part Number: CDCE62005 hello, I want to initialize and program CDCE62005 with my own circuit. But now I have some problems. First, I am not sure whether the peripheral circuit of the chip built is correct, I cannot confirm whether the chip works, and…
    • over 1 year ago
    • Clock & timing
    • Clock & timing forum
  • DAC3482EVM: DAC3482EVM CDCE62005 PLL problem

    Ibrahim Yararoglu
    Ibrahim Yararoglu
    Part Number: DAC3482EVM Hi I have DAC3482EVM. I'm trying to configure the CDCE62005 integrated on the board. Although I do the same configuration, I see my clock signal, which should normally be set to 64Mhz, at different frequencies each time. I…
    • over 1 year ago
    • Data converters
    • Data converters forum
  • CDCE62005: the chip on the 2nd position can not be locked

    Huang Feng
    Huang Feng
    TI Thinks Resolved
    Part Number: CDCE62005 Hi, We meet a problem: we use two CDCE62005 multistage cascaded, some the 2nd chip's lock signal on the board is unlock. Our SCH is the same as TI 6678 EVM, using SPI interface from FPGA, and the config file is created from TI…
    • over 2 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • DAC3482EVM: CDCE62005 setting

    Kei Kuwahara
    Kei Kuwahara
    Resolved
    Part Number: DAC3482EVM Hello team, I am using DAC3482EVM with TSW1400EVM. On the p.9 of the DAC348xEVM user's guide, it says, Y3: FPGA Clock 1. This clock is an ac coupled LVDS. The clock rate for this should be – F DAC /interpolation/2 for …
    • Resolved
    • over 2 years ago
    • Data converters
    • Data converters forum
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