Part Number: CDCE925 Hi Team,
We are planning to use CDCE925 clock generator. We have Aarvark I2C adaptor with us. Can I program mentioned clock generator IC with this adaptor through TI Clock pro software?
Aardvark I2C/SPI Host Adapter - Total…
Part Number: CDCE925 Section 11 of the data sheet mentions that the VDD pin should be grounded when VDD_OUT is applied first. This doesn't make sense to me. In my case the 1.8V VDD supply is derived from the 3.3V Supply for VDD_OUT so VDD_OUT will be…
Part Number: CDCE925 Other Parts Discussed in Thread: CLOCKPRO I am using 12.8Mhz as the clock input and hope that the output Y1 is 16.9344Mhz and Y5 is 27Mhz,but when using Ti clock pro for eeprom configuration, Y1 can output 16.9344, Y5 output is 12…
Part Number: CDCE925 I would like to ask a question for the CDCE925.
Now we measured the frequency of the output clock from the CDCE925 as follows.
・Measurement result In Xtal mode (Vctrl=1.8V) 26.9992MHz In VCXO mode (Vctrl=0 V) 26.9992MHz In VCXO…
Part Number: CDCE925 Hi
When the external clock is provided using the clock buffer, the frequency cannot be adjusted; It can be adjusted when using the crystal directly as an external clock source.
REN_8L30110_DST_20180411.pdf
Part Number: CDCE925 Dears,
We use VCXO capacitance to adjust the frequency, the range is too small, whether there are other ways to adjust,
max is 80ppm
cap------1.8V--------0V---------PPM 12pf 48.00404 48.00022 0.00007958 10pf 48.00475 48.00077…
Part Number: CDCE925 Hi team,
My customer is searching a clock generator, and I would like come to you check about their requirement:
6 output(frequency:32.768kHz, 19.2MHz, 38.4MHz, 76.8MHz, 24MHz, 26MHz)
Load Capacitor: 10pF
Total Size: <50mm…
Part Number: CDCE925 Other Parts Discussed in Thread: CLOCKPRO I am using your clock pro 1.2.1 software to generate three clock 20MHz, 7.3728Mhz and 30.72MHz from 10Mhz input clock, software selected CDCE925pwr chip and assigned these three signal to…
Part Number: CDCE925 Hi team,
My customer is considering using multiple CDCE925s on a board, and has question on its slave address setting.
On the datasheet, Table 5 shows slave receiver address. It states that A1 and A0 are programmable, and user…
Part Number: CDCE925 In the datasheet, and CLock PRO software, it mentioned that out clock has zero ppm error, what does it mean? does it mean the output clock has zero phase shift with input clock signal? thanks