Part Number: CDCE949-Q1 Tool/software: I would like to use the IC in default mode (no I2C communication) with clock input of 600kHz and 9 outputs at 600kHz.
It seems feasible from my understanding of the default mode. The only thing that I'm not sure…
Part Number: CDCE949 Tool/software: Hi.
While using CDCE949PW. I had problem with writing and reading the register values from i2c communication. I used several frequency for SCL (400khz,100khz,less than 100khz) whenever I try to read any register,…
Part Number: CDCE949 Dear Product line engineer
I use CDCE949 in my reference design. the schematic as below. I had remove R48 and measured Pin2(S0) is high. Pin 1 is a square-wave with 1.8V/1MHz by external signal generator. under this conditions,…
Part Number: CDCE949
Hello, we are using the CDCE949 with the following configuration. External crystal with 20MHz attached to the device, so crystal oscillator is used. VDD is 1.8V (+/-5%) and VDDOUT is 3.3V (+/-5%). The outputs are programmed as follows…
Part Number: CDCE949 Posting for a customer:
I am currently using the CDCE949 Clock generator chip to run various clocks for our ADCs and DACs. However, we are running into a small issue that I really don't know how to explain.
We are using a Crystal…
Part Number: CDCE949 We are using the CDCE949 with an external 20 MHz crystal, so the CDCE949 is used as crystal buffer with cascaded PLLs to provide the required clock (e.g. 25 MHz, 33 MHz etc). According datasheet no maximum time for start-up time is…
Part Number: CDCE925 Other Parts Discussed in Thread: CDCE949 , SN74LVC2G157 , LMK00105 , CDCE6214 , CDCM6208 Hi,
I am using CDCE949 clock generator. I want to disable one of the clock generator pin and use external clock source with SMA connector through…
Part Number: CDCE949 Other Parts Discussed in Thread: LMK04832 Hello,
Two CDCE949 are connected in parallel and are fed by the same input clock (20 MHz).
What is the maximum Skew between a signal from the first devide and a signal from the second…
Part Number: CDCE949 Other Parts Discussed in Thread: CDCE6214-Q1 , LMK05318B Hello expert. I have questions for CDCE(L)949. Fisrt, I'd like to know about each output which is generated by same PLL are synchronized output phase. We'd like to generate…
Part Number: CDCE949 Hello Guys,
Good day.
Our customer wants to clarify which of the following PLL settings limit is correct. The one on page29 of the datasheet where the limits are: 16 ≤ Q ≤ 63, 0 ≤ P ≤ 4, 0 ≤ R ≤ 51, or the footnote (5) on page…
