Hi Andrew,
If they're already planning to use a separate device it may be simpler to use LMK1D1204 instead of CDCLVP1204. 300ps max Tr/Tf and P2P with CDCLVD1204, and the whole signal chain stays LVDS so no additional level-shifting termination is required…
Other Parts Discussed in Thread: LMK00304 , CDCLVD1204 Hi,
I want to use CDCLVD1204 as clock distribution to driver four AFE 5801, as CDCLVD1204 is quite simple compared to LMK00304. But compred to LMK00304, the Jitter is bigger.
Is it OK to use CDCLVD1204…
Other Parts Discussed in Thread: CDCLVD1204 Hello,
I am driving the CDCLVD1204 inputs in the single ended mode. Do I need to connect the unused negative pin to the VAC_REF pin or should I connect it to 1.25V?
Best regards
Other Parts Discussed in Thread: CDCLVD1204 Hi,
There is a 600 psec part to part skew spec on these parts that is over temperature (-40 to +85C) and supply voltage.
Does this spec assume that all the parts are at the same temperature, somewhere between…
Other Parts Discussed in Thread: CDCLVD1204 Hi
Customer is designing a system that requires clock buffer with 3 LVDS clock outputs/ and ultra low jitter
Clock freq. options: 19.2MHz, 26MHz, 38.4MHz and 52MHz (only one freq shall be active)
Preferred…
Hi Ueli,
The difference in output levels may be due to the termination used on the LVPECL outputs. LVPECL output termination should match datasheet figures 12 or 13.
It may be an option to use CDCLVD1204 with some update to remove the 130 bias resistors…
Hello Trevor,
We have quite a few LVDS and LVPECL buffers that could be of use. The output from the LMX2594 will likely need to be AC-coupled and biased as per the buffers input requirements.
LMK00304: selectable output format
CDCLVD1204: LVDS
CDCLVP1204…
Other Parts Discussed in Thread: CDCLVD1204 Hello,
I need a 1:4 buffer in which two LVCMOS inputs are muxed and four outputs are LVDS, in that way as in the block diagram. Can you recommend on such a buffer of TI ?
