Part Number: CDCLVP1208 Tool/software: Hello,
Does TI have any maximum values for additive RMS jitter when the supply voltage is 3.3V? There are maximums in the datasheet for when the supply voltage is 2.5V but none for 3.3V.
Thank you!
Best…
Part Number: CDCLVP1208 Hello,
I am interested in using the CDCLVP1208 but my design requires an output enable pin. Since I only have one input, I was thinking I could connect my input clock signal to IN1 and leave IN0 floating. I would put a pulldown…
Part Number: CDCLVP1208
I see some disscution for value of the coupling capacitors in page 7 of TI technical application report SCAA056.
If possible to replace legacy AC-coulping from 10nf to 4.7nf FOR LVPECL output to CML 156.25MHz application ?
Part Number: CDCLVP1208 Other Parts Discussed in Thread: LMK04832 Dear Team,
In our design we are using multiple ADC’s , for clock feeding to the ADC’s from the single reference clock using CDCLVP1208 Buffer we will generate the multiple clock and…
Hi SB,
This is acceptable. Since you are AC coupling, you will need to provide the correct input bias voltage to the CDCLVP1208 inputs. 2 ways to do this are by adding resistors to Vcc as shown in the datasheet, page 17:
Or you can use 50ohm resistors…
Part Number: CDCLVP1208 Hi Sir,
Our customer want to use the CDCLVP1208 LVPECL to LVDS(MAC input type).
But we have 3 question for this application,
http://www.ti.com/lit/ug/scau038/scau038.pdf
Q1: TI document SCAA059C show the Table 2 LVDS…
Part Number: CDCLVP1208 Hi Sir,
CDCLVP1208 EVM is using 4.7uF cap on VAC_REF pin while CDCLVP1208 spec suggest to use 0.1uF cap on VAC_REF pin.
May i learn from you which one we should follow?
Thanks,
Patrick
Part Number: CDCLVP1208 Dear Team,
My customer wants to use the CDCLVP1208 for their clock distribution.
On the datasheet :
On first page :
Will it be safe to assume we can get VOut_diff of 1.15Vpp at 250MHz ?
Regards,
Nir.
