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Showing 55 results View by: Thread Post Sort by
  • CDCUN1208LP: Clock buffer timing appears to be not met by my design. Adding capacitors didn't help. Other Ideas?

    Clark Tollerson
    Clark Tollerson
    Part Number: CDCUN1208LP An old design worked for years but a respin changed the circuit slightly to change from 2 clock outputs to 4 clock outputs. I am trying to see if we have timing issues or voltage issues or layout issues. First did I connect the…
    • 1 day ago
    • Clock & timing
    • Clock & timing forum
  • CDCUN1208LP: Single-ended output when set to LVDS/HCSL

    Canneton Howard
    Canneton Howard
    TI Thinks Resolved
    Part Number: CDCUN1208LP When using the CDCUN1208LP with 2.5V HCSL or LVDS outputs, is it possible to use one of the P outputs only as a single-ended output for a LVCMOS receiver?
    • 7 months ago
    • Clock & timing
    • Clock & timing forum
  • CDCUN1208LP: Both output LVDS and LVCMOS

    Yuxi Liu(Tony)
    Yuxi Liu(Tony)
    TI Thinks Resolved
    Part Number: CDCUN1208LP Tool/software: Hi TIer Could I get the LVDS and LVCMOS output in same time when use CDCUN1208DP? If not , is there any other solution? input is 160Mhz LVDS , 1.8V ,output is 40Mhz *3 LVDS 1.8V , 40Mhz * 1 LVCMOS 1.8V.…
    • over 1 year ago
    • Clock & timing
    • Clock & timing forum
  • CDCUN1208LP: Clock buffers with automatic crossover

    Craig Brideau
    Craig Brideau
    Part Number: CDCUN1208LP Tool/software: Just curious if you could point me to any other parts you may offer with the smart input multiplexer or similar feature used in your CDCUN1208P. Ideally we are looking for LVDS or LVCMOS. We have 4x redundant…
    • over 1 year ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCUN1208LP: Minimum Frequency (1PPS Support?)

    ghweng1
    ghweng1
    Resolved
    Part Number: CDCUN1208LP We would like to use the CDCUN1208LP to support both clock distribution and 1PPS timing reference distribution. The datasheet lists 0.008MHz, is this the 'TRUE' minimum operating frequency of this device or will it support lower…
    • Resolved
    • over 2 years ago
    • Clock & timing
    • Clock & timing forum
  • CDCUN1208LP: Power down sequence

    Shaii Amrusi
    Shaii Amrusi
    TI Thinks Resolved
    Part Number: CDCUN1208LP Hi I need to know if there is any constraints on power down it is clear from the datasheet that i need to start up on strict manor but nothing about the power down. my system runs from VDD CORE - 3.3V VDDO1,2,3,4 voltage…
    • over 3 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCUN1208LP: Clock divider selection

    Hue Phung
    Hue Phung
    Resolved
    Part Number: CDCUN1208LP Hello, I have a question here about the clock divider selection. I am using the part in pin mode, I would like to know once the part is powered up, can I change the clock divider ratio on the fly, going back and forth from…
    • Resolved
    • over 3 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCUN1208LP: Power supply ramp question

    Mark Cianchetti
    Mark Cianchetti
    Resolved
    Part Number: CDCUN1208LP Hello, regarding the CDCUN1208LP. I see a min slew rate of 6500V/s in the datasheet. For 3.3V that's about 0.5ms. Is that the minimum rise time? The datasheet is confusing because it states 6500V/s is the minimum slew rate,…
    • Resolved
    • over 3 years ago
    • Clock & timing
    • Clock & timing forum
  • CDCUN1208LP: Questions that dont have answers in the datasheet

    Shaii Amrusi
    Shaii Amrusi
    Part Number: CDCUN1208LP We are using CDCUN1208LPR (IC) as clock distributor from 16MHz 3.3LVCMOS input to 8 channels LVDS output (see the attached scheme - DNA means not assembled resistor). We can control both of the supply voltages by software (2…
    • over 3 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCUN1208LP: Cascading buffers

    Mark Cianchetti
    Mark Cianchetti
    Resolved
    Part Number: CDCUN1208LP Other Parts Discussed in Thread: LMK1D1216 , CDCLVP1216 I couldn't find any documentation on whether these buffers can be cascaded. Is there anything besides additive jitter/propagation delay that would disallow cascading two…
    • Resolved
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
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