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  • LMX2594: Clocking for ADC12DJ5200 and DAC39RF10

    TI Thinks Resolved
    Part Number: LMX2594 Other Parts Discussed in Thread: LMK04832 , Hi, Could you guide which is better clocking solution for below application? Case 1 Case2 Thanks.
    • Answered

  • DAC39RF10: DDS Mode switching time and SFDR clarifications

    Resolved
    Part Number: DAC39RF10 Hi everyone, I'm working with the DAC39RF10 and have a few questions regarding its performance: RF settling time: After the NCOs have been configured, what is the RF settling time of the DAC39RF10? Maximum frequency in NCO…
    • Resolved
    • Answered

  • DAC39RF10: Can the VDDIO for this device be operated at 1.5V logic levels?

    Resolved
    Part Number: DAC39RF10 I would like to use this part with Versal FPGAs from AMD/Xilinx which have 1.5V max I/O bank voltages, but noticed that this part's VDDIO has a recommended range of 1.71 to 1.89V. Is it possible to operate VDDIO at 1.5V logic levels…
    • Resolved
    • Answered

  • DAC39RF10: Inverse Sinc Filter

    Resolved
    Part Number: DAC39RF10 Hello, Does DAC39RF10 support inverse sinc filters to flatten the frequency response of the sample-and-hold output? Each mode NRZ, RTZ, RF and DES has individual specific inverse sinc filter respectively? Best regards, K.Hira…
    • Resolved

  • DAC39RF10: JESD setting for Lane0 and Lane1

    TI Thinks Resolved
    Part Number: DAC39RF10 Hi, Can user set JESD for Lane0 --> DAC0, Lane1 --> DAC1? user doesn't want to use Lane2 and Lane3. Thanks.
    • Answered

  • DAC39RF10: Where can the Excel sheet latency calculator mentioned in the data sheet be found ?

    Resolved
    Part Number: DAC39RF10 Dear TI team, the data sheet states in section "7.4.4 Data Path Latency" it is mentioned: There are several difference latencies defined for the device as shown in Figure 7-57 and listed in Table 7-40. The latency within the…
    • Resolved
    • Answered

  • DAC39RF10: Specification of external reference input is missing in the datasheet

    Resolved
    Part Number: DAC39RF10 Dear TI team, in "table 6-1" EXTREF is describes as an optional reference input. At this point there is no mentioning, that this pinb can also serve as an output. In section 7.5, DC specifications however, technical details…
    • Resolved
    • Answered

  • DAC39RF10: How does the stated max. summed supply current for VDDLA, VDDLB and VDDCLK10 divides up for each of the three rails ?

    Resolved
    Part Number: DAC39RF10 Dear TI team, the data sheet mentions a summed max. current for (VDDLA + VDDLB + VDDCLK10) = ~820 mA. Knowing the current requirement for each of these three rails could allow for a separate and possibly lower-current rated…
    • Resolved

  • DAC39RF10EVM: Is it Possible to use the DAC39RF10EVM without a pattern generator?

    TI Thinks Resolved
    Part Number: DAC39RF10EVM Other Parts Discussed in Thread: TSW14J59EVM , , DAC39RF10 Tool/software: Hi, the user guide for the DAC39RF10EVM shows examples of how to use the board in combination with a TSW14J59EVM board. Is it possible to generate tones…

  • DAC39RF10EVM: Issue with Modifying LMX1204 Settings on DAC39RF10EVM Evaluation Board

    Part Number: DAC39RF10EVM Other Parts Discussed in Thread: LMX1204 , DAC39RF10 Tool/software: Hello, I am looking to control the LMX1204 component on the DAC39RF10EVM evaluation board in order to configure it as follows: LMX CLKp: 1.28 GHz (SMA100B…

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