Part Number: DAC60004 Other Parts Discussed in Thread: DAC80004 /can youAm I correct in that we do not have an IBIS model for the digital interface on this device? If I'm correct, is there a device with a model similar enough that we can use instead?…
Hi Uttam,
Thanks for the reply. The scale on the graph was accidentally made 50V per division. But I was checking the average value of the corresponding channel on the scope which was reading as few mV only. I changed the scale and took results again…
Part Number: TIDA-01352 Other Parts Discussed in Thread: LM5030 , DAC60004 Hi all,
We are promoting TIDA-01352, customer has following questions:
1. Why TIDA use non-isolation feedback while there is an isolation feedback on LM5030 datasheet? Do customer…
Hi Hank,
Please consider the DAC60004 or the DAC60504. The main difference between the two is that the DAC60504 features an internal reference.
Thanks,
Paul
Hi Sebastian,
I believe you should consider the DAC60504 or the DAC60004. The DAC60504 has an internal reference, and can have an output range of 1.25V, 2.5V, or 5V with its internal reference. The DAC60004 does not have an internal reference, so if…
Hi Jerry,
That information is not available for the TLV5614. We will not be able to provide it. If you would like to contact me directly to discuss the potential volume of this socket, please reach out to me at frost@ti.com. Otherwise, please consider…
Other Parts Discussed in Thread: DAC60004 , OPA4188 , LMH6321 Hello everyone,
For certain application, we need analogue output complying with following characteristics
Basic output from DAC60004
Software selection between:
Unipolar : 0 Vdc to…
Hello David,
Find my responses to your questions below.
Q0. Is settling time equal to Sample/update rate (MSPS)?
A: No, the settling time specified is analog. The overall update rate will be the combination of the digital write time (which is dependent…
Hi Utpal,
Let me answer your questions.
1) How does Update Rate get mapped with DAC?
[RP]: In this case, the settling time of DAC output will dominate the output update time.
Assuming SPI SCLK is clocking at 50MHz and you need minimum 32 clocks…
