Part Number: DP83630 Other Parts Discussed in Thread: DP83640 ,
Tool/software:
Hi,
I am trying to check DP83630 in half-duplex mode in PTP. It seems to me that the timestamps are not working. After reading the DP83640 Software Development Guide, section…
Part Number: DP83630 Other Parts Discussed in Thread: DP83640 Tool/software: HI,
Sometime ago I was trying to use 1STEP PTP mode with DP83630 and SAMA5D35 MPU and I have noticed that some packets are transmitted with UDP checksum wrong. After a long…
Part Number: DP83630 Tool/software: Hi,
We are designing PTP plug-in card based on DP83630 and we need to replace our customer's existing card which was based on different PHY while the magnetics and RJ45 jack are on the motherboard and must be left…
Part Number: DP83630 Tool/software: The data sheet doesn't provide any thermal parameters to model the package. Please advise on how to predict temperatures.
Part Number: MCU-PLUS-SDK-AM243X Other Parts Discussed in Thread: DP83630 Hi all,
DP83630 datasheet says in section 6.6 that there is a Software Development Guide for the DP83630.
May I know which document it's referring to? I cannot find a exact match…
Hi Srikanth,
srikanth said: can you share example code for udp or tcp/ip protocol for LAUNCHXL2-570LC4357.
(+) [FAQ] TMS570LC4357: Examples and Demos available for Hercules Controllers (E.g. TMS570x, RM57x and RM46x etc) - Arm-based microcontrollers forum…
Part Number: DP83630 Hi,
We are doing the pressure test of DP83630’s PTP and see an issue.
DP83630 works as slave, it receives the sync message and record the T2.
By set PTP_CTL bit4 （ load m clock ）， and read PTP_TDR, we can get the time.
Got a wrong…
Part Number: DP83630 Hi All,
I have a question about the DP83630. If I don't use the LED_ACT pin, can I leave it open? Or do you need to do pullups and pulldowns? If the default option is required, then there is no need for external pull-up or pull down…
Part Number: DP83630 Other Parts Discussed in Thread: DP83869 Hi,
We are trying to use DP83630 PHY to design copper SFP, as per block diagram shown below
on DP83630 for above circuit is how to interface clock signals (especially TXCLK and TXEN signals…
