Hi Tanmay,
1. Crystal oscillator is not working of the TJA1101 phy, Let's check the hardware first.
2. Now there is a new board that has stickers DP83TG720S-Q1:
the SOC can read the phy id: 0x2000a284
but the tda4-evm linux has no DP83TG720S drivers…
Hi Aarathi,
INH pin is only an output. However, I do caution, that the EVM is not the best platform to evaluate DP83TG720's sleep mode feature due to the fact that supplies are not cut off immediately upon entering sleep mode.
Sincerely,
Gerome
Hi Alvaro,
Thank you for your suggestion!
The customer feedback that he took the DP83TG720S-Q1 EVM board to the lab for this test, and the test results were also failed, as follows:
Can you help analyze the problem and see where it is? Can we improve…
Hi team,
I have an additional question.
My customer wants to rewrite register of DP83TG720S on thier test board.
Is it possible to rewrite the register of the PHY on the test board by connecting the MDC & MDIO pin of MCU which is on the EVM of 100BASE…
Hi Rahul,
Thank you for the quick responce ,
Gigabit copper Ethernet uses 4 channels, where as automotive Ethernet uses a single pair. - Yes that i know .
So in 88E1512 Phy IC MDI - Media Dependent Interface used for connectivity between PHY and Connector…
Part Number: DP83TG720EVM-MC Hi Team,
Do you know the reason for this crystal connection with different resistors (R97 and R28) on the DP83TG720 EVM?
Thanks!
Roy
Kallikuppa Sreenivasa said: How is customer configuring test mode for jitter test?
----When testing TX_TCLK125 master jitter, the test mode is configured as 1, corresponding to 0x01.0x0904=0x2000 During the test, 0x1f.0x0453=0x0019 was also configured…