Hi Everyone,
Let me ask about Data Enable signal as below.
Please let me know about timing requirement from DE rising edge to INA/Bn and IN_CLK (see attached)
Can the signal that is synchronous with Horizontal Sync signal use as DE signal ?
Can DE pin…
Other Parts Discussed in Thread: DS90C187 Hi Everyone,
Now our customer has evaluated DS90C187, and then plan to change vertical front porch to change frame rate during operation. Then they are concerning if blackout will be happened when changing frame…
Other Parts Discussed in Thread: DS90C187 Hi Everyone,
Our customer plan to use DS90C187 with Single in Dual out 18bpp. Then please let me know the connection of OA_3+/- and OB_3+/- output. Can they leave open?
Best Regards,
Sonoki / Japan Disty
Other Parts Discussed in Thread: DS90C187 Dear,
I'm currently designing an embedded screen 9" with 1080p resolution. This screen uses dual lvds pixel to get this resolution. My source supplies 24 bits RGB 1080p and I can set the pixel clock if it's needed…
Hi Kygo,
The DS90C187 is non-Q1. If you need a 3.3v version, there is the DS90C387.
Is the customer set on using 947 and 948? A DS90UB921 or DS90UB925 can convert from parallel RGB to dual OLDI at the cost of lower bandwidth.
Regards,
Jack
Part Number: SN74AVC24T245 Other Parts Discussed in Thread: DS90C187 , SN74AUC16244 , SN74AUC244 Dear team,
My customer needs a 24bits level shifter between CPU and DS90C187, and the Pixel clock of CPU is 177MHz. Can our device achieve below situation? The…
Part Number: DS90C185 Other Parts Discussed in Thread: DS90C187 Hi.
Please tell me the meanings of this notation "DS90C185(Transmitter)", like Fig 5 "DS90C185 (Transmitter) Input Clock Transition Time".
I think "DS90C185 (Transmitter…
