Part Number: LMK00301 Tool/software: Dear Experts,
The design schematic diagram is as follows.The design schematic diagram is as follows. Our current FPGA design requirements are: differential input voltage range of 100mV~600mV, common mode input voltage…
Part Number: LMK00301
Tool/software:
hi,
we use LMK00301 for 8 buffer outputs. two left unused. LVDS output.
can we just floating the unused output pins without any PCB trace? or can we just connect 100ohm termination resistor?
how to understand…
Part Number: LMK00301 Tool/software: I'm planning to use the clock from the LMK00301ARHST as the input clock for a self-biased receiver.
My receiver can accept a voltage swing between 0.5V and 2.6V and is self-biased to 1.85V.
I intend to configure…
Part Number: LMK00301
Tool/software:
Hi, The datasheet feature says the LVDS frequency range is DC to 2100MHz, but the specification table says 1.0GHz to 1.6GHz, and Figure 7-2 shows the LVDS Output Swing (VOD) vs. Frequency range as 100MHz to 1.3GHz…
Part Number: LMK00301 Other Parts Discussed in Thread: LMK1D2102 Tool/software: Dear Experts,
We are selecting a clock buffer that meets the requirements of one 27MHz differential clock input (LVDS) and two 27MHz differential clock outputs (LVDS). We…
Part Number: LMK00301 Tool/software: The latest datasheet has 3 phase noise plots at 100MHz, Figure 7-21, 22, 23. I would like similar phase noise plots at 625MHz for LVDS and LVPECL.
Part Number: LMK00301 Tool/software: In an LVDS output configuration, is there any issue using CLKoutX_TYPE1 as a dynamically controlled output disable pin?
Part Number: LMK00301 Tool/software: Could you, please, provide what the Junction-to-board thermal resistance information for the part ( LMK00301ARHST )?
Part Number: LMK00301 Tool/software: What is the expected switching time (new output after changing CLKin_SEL) for the LMK00301?
Normally I am observing a very fast switching time, but occasionally I see about 12 usec, which seems long.
Thanks
Part Number: LMK00301 Under the conditions of LVPECL, Vcco=3.3V, CLKin=156.25MHz, JitterADD (Additive RMS Jitter, Integration Bandwidth 10 kHz to 20 MHz) of LMK00301 is typ:54fs, max78:fs. Under the conditions of LVDS, Vcco=3.3V, CLKin=156.25MHz, JitterADD…